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@@ -1355,6 +1355,7 @@ static void intel_enable_ddi(struct intel_encoder *intel_encoder)
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}
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if (intel_crtc->config.has_audio) {
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+ intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO);
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tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
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tmp |= ((AUDIO_OUTPUT_ENABLE_A | AUDIO_ELD_VALID_A) << (pipe * 4));
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I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
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@@ -1372,10 +1373,15 @@ static void intel_disable_ddi(struct intel_encoder *intel_encoder)
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struct drm_i915_private *dev_priv = dev->dev_private;
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uint32_t tmp;
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- tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
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- tmp &= ~((AUDIO_OUTPUT_ENABLE_A | AUDIO_ELD_VALID_A) <<
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- (pipe * 4));
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- I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
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+ /* We can't touch HSW_AUD_PIN_ELD_CP_VLD uncionditionally because this
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+ * register is part of the power well on Haswell. */
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+ if (intel_crtc->config.has_audio) {
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+ tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
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+ tmp &= ~((AUDIO_OUTPUT_ENABLE_A | AUDIO_ELD_VALID_A) <<
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+ (pipe * 4));
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+ I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
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+ intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO);
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+ }
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if (type == INTEL_OUTPUT_EDP) {
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struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
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