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@@ -11778,6 +11778,12 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc)
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reg = PIPECONF(crtc->config.cpu_transcoder);
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I915_WRITE(reg, I915_READ(reg) & ~PIPECONF_FRAME_START_DELAY_MASK);
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+ /* restore vblank interrupts to correct state */
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+ if (crtc->active)
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+ drm_vblank_on(dev, crtc->pipe);
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+ else
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+ drm_vblank_off(dev, crtc->pipe);
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+
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/* We need to sanitize the plane -> pipe mapping first because this will
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* disable the crtc (and hence change the state) if it is wrong. Note
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* that gen4+ has a fixed plane -> pipe mapping. */
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