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@@ -34,6 +34,7 @@
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#include <linux/of_device.h>
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#include <linux/pagemap.h>
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#include <linux/platform_device.h>
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+#include <linux/reset.h>
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#include <linux/serial.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_core.h>
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@@ -44,8 +45,6 @@
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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-#include <linux/clk/tegra.h>
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-
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#define TEGRA_UART_TYPE "TEGRA_UART"
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#define TX_EMPTY_STATUS (UART_LSR_TEMT | UART_LSR_THRE)
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#define BYTES_TO_ALIGN(x) ((unsigned long)(x) & 0x3)
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@@ -103,6 +102,7 @@ struct tegra_uart_port {
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const struct tegra_uart_chip_data *cdata;
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struct clk *uart_clk;
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+ struct reset_control *rst;
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unsigned int current_baud;
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/* Register shadow */
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@@ -832,9 +832,9 @@ static int tegra_uart_hw_init(struct tegra_uart_port *tup)
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clk_prepare_enable(tup->uart_clk);
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/* Reset the UART controller to clear all previous status.*/
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- tegra_periph_reset_assert(tup->uart_clk);
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+ reset_control_assert(tup->rst);
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udelay(10);
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- tegra_periph_reset_deassert(tup->uart_clk);
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+ reset_control_deassert(tup->rst);
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tup->rx_in_progress = 0;
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tup->tx_in_progress = 0;
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@@ -1320,6 +1320,12 @@ static int tegra_uart_probe(struct platform_device *pdev)
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return PTR_ERR(tup->uart_clk);
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}
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+ tup->rst = devm_reset_control_get(&pdev->dev, "serial");
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+ if (IS_ERR(tup->rst)) {
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+ dev_err(&pdev->dev, "Couldn't get the reset\n");
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+ return PTR_ERR(tup->rst);
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+ }
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+
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u->iotype = UPIO_MEM32;
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u->irq = platform_get_irq(pdev, 0);
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u->regshift = 2;
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