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@@ -162,6 +162,50 @@ struct mmc_host_ops {
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unsigned int direction, int blk_size);
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};
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+struct mmc_cqe_ops {
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+ /* Allocate resources, and make the CQE operational */
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+ int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
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+ /* Free resources, and make the CQE non-operational */
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+ void (*cqe_disable)(struct mmc_host *host);
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+ /*
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+ * Issue a read, write or DCMD request to the CQE. Also deal with the
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+ * effect of ->cqe_off().
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+ */
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+ int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
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+ /* Free resources (e.g. DMA mapping) associated with the request */
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+ void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
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+ /*
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+ * Prepare the CQE and host controller to accept non-CQ commands. There
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+ * is no corresponding ->cqe_on(), instead ->cqe_request() is required
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+ * to deal with that.
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+ */
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+ void (*cqe_off)(struct mmc_host *host);
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+ /*
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+ * Wait for all CQE tasks to complete. Return an error if recovery
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+ * becomes necessary.
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+ */
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+ int (*cqe_wait_for_idle)(struct mmc_host *host);
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+ /*
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+ * Notify CQE that a request has timed out. Return false if the request
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+ * completed or true if a timeout happened in which case indicate if
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+ * recovery is needed.
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+ */
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+ bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
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+ bool *recovery_needed);
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+ /*
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+ * Stop all CQE activity and prepare the CQE and host controller to
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+ * accept recovery commands.
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+ */
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+ void (*cqe_recovery_start)(struct mmc_host *host);
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+ /*
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+ * Clear the queue and call mmc_cqe_request_done() on all requests.
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+ * Requests that errored will have the error set on the mmc_request
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+ * (data->error or cmd->error for DCMD). Requests that did not error
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+ * will have zero data bytes transferred.
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+ */
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+ void (*cqe_recovery_finish)(struct mmc_host *host);
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+};
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+
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struct mmc_async_req {
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/* active mmc request */
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struct mmc_request *mrq;
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@@ -303,6 +347,8 @@ struct mmc_host {
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#define MMC_CAP2_HS400_ES (1 << 20) /* Host supports enhanced strobe */
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#define MMC_CAP2_NO_SD (1 << 21) /* Do not send SD commands during initialization */
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#define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */
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+#define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */
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+#define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */
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mmc_pm_flag_t pm_caps; /* supported pm features */
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@@ -386,6 +432,13 @@ struct mmc_host {
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int dsr_req; /* DSR value is valid */
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u32 dsr; /* optional driver stage (DSR) value */
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+ /* Command Queue Engine (CQE) support */
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+ const struct mmc_cqe_ops *cqe_ops;
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+ void *cqe_private;
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+ int cqe_qdepth;
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+ bool cqe_enabled;
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+ bool cqe_on;
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+
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unsigned long private[0] ____cacheline_aligned;
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};
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