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@@ -47,6 +47,7 @@
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#define INTC_ILR0 0x0100
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#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
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+#define SPURIOUSIRQ_MASK (0x1ffffff << 7)
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#define INTCPS_NR_ILR_REGS 128
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#define INTCPS_NR_MIR_REGS 4
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@@ -329,11 +330,35 @@ static int __init omap_init_irq(u32 base, struct device_node *node)
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static asmlinkage void __exception_irq_entry
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omap_intc_handle_irq(struct pt_regs *regs)
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{
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+ extern unsigned long irq_err_count;
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u32 irqnr;
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irqnr = intc_readl(INTC_SIR);
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+
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+ /*
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+ * A spurious IRQ can result if interrupt that triggered the
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+ * sorting is no longer active during the sorting (10 INTC
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+ * functional clock cycles after interrupt assertion). Or a
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+ * change in interrupt mask affected the result during sorting
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+ * time. There is no special handling required except ignoring
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+ * the SIR register value just read and retrying.
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+ * See section 6.2.5 of AM335x TRM Literature Number: SPRUH73K
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+ *
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+ * Many a times, a spurious interrupt situation has been fixed
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+ * by adding a flush for the posted write acking the IRQ in
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+ * the device driver. Typically, this is going be the device
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+ * driver whose interrupt was handled just before the spurious
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+ * IRQ occurred. Pay attention to those device drivers if you
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+ * run into hitting the spurious IRQ condition below.
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+ */
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+ if (unlikely((irqnr & SPURIOUSIRQ_MASK) == SPURIOUSIRQ_MASK)) {
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+ pr_err_once("%s: spurious irq!\n", __func__);
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+ irq_err_count++;
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+ omap_ack_irq(NULL);
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+ return;
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+ }
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+
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irqnr &= ACTIVEIRQ_MASK;
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- WARN_ONCE(!irqnr, "Spurious IRQ ?\n");
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handle_domain_irq(domain, irqnr, regs);
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}
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