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@@ -1137,6 +1137,16 @@ static void gfx_v9_0_gpu_early_init(struct amdgpu_device *adev)
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gb_addr_config = VEGA12_GB_ADDR_CONFIG_GOLDEN;
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DRM_INFO("fix gfx.config for vega12\n");
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break;
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+ case CHIP_VEGA20:
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+ adev->gfx.config.max_hw_contexts = 8;
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+ adev->gfx.config.sc_prim_fifo_size_frontend = 0x20;
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+ adev->gfx.config.sc_prim_fifo_size_backend = 0x100;
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+ adev->gfx.config.sc_hiz_tile_fifo_size = 0x30;
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+ adev->gfx.config.sc_earlyz_tile_fifo_size = 0x4C0;
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+ gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);
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+ gb_addr_config &= ~0xf3e777ff;
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+ gb_addr_config |= 0x22014042;
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+ break;
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case CHIP_RAVEN:
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adev->gfx.config.max_hw_contexts = 8;
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adev->gfx.config.sc_prim_fifo_size_frontend = 0x20;
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