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@@ -2612,7 +2612,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
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r = KVM_MAX_MCE_BANKS;
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break;
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case KVM_CAP_XCRS:
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- r = cpu_has_xsave;
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+ r = boot_cpu_has(X86_FEATURE_XSAVE);
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break;
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case KVM_CAP_TSC_CONTROL:
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r = kvm_has_tsc_control;
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@@ -3122,7 +3122,7 @@ static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
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static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
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struct kvm_xsave *guest_xsave)
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{
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- if (cpu_has_xsave) {
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+ if (boot_cpu_has(X86_FEATURE_XSAVE)) {
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memset(guest_xsave, 0, sizeof(struct kvm_xsave));
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fill_xsave((u8 *) guest_xsave->region, vcpu);
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} else {
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@@ -3140,7 +3140,7 @@ static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
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u64 xstate_bv =
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*(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
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- if (cpu_has_xsave) {
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+ if (boot_cpu_has(X86_FEATURE_XSAVE)) {
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/*
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* Here we allow setting states that are not present in
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* CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
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@@ -3161,7 +3161,7 @@ static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
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static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
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struct kvm_xcrs *guest_xcrs)
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{
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- if (!cpu_has_xsave) {
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+ if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
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guest_xcrs->nr_xcrs = 0;
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return;
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}
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@@ -3177,7 +3177,7 @@ static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
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{
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int i, r = 0;
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- if (!cpu_has_xsave)
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+ if (!boot_cpu_has(X86_FEATURE_XSAVE))
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return -EINVAL;
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if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
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@@ -5866,7 +5866,7 @@ int kvm_arch_init(void *opaque)
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perf_register_guest_info_callbacks(&kvm_guest_cbs);
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- if (cpu_has_xsave)
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+ if (boot_cpu_has(X86_FEATURE_XSAVE))
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host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
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kvm_lapic_init();
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