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@@ -875,6 +875,15 @@ static long restore_tm_user_regs(struct pt_regs *regs,
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return 1;
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#endif /* CONFIG_SPE */
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+ /* Get the top half of the MSR from the user context */
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+ if (__get_user(msr_hi, &tm_sr->mc_gregs[PT_MSR]))
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+ return 1;
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+ msr_hi <<= 32;
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+ /* If TM bits are set to the reserved value, it's an invalid context */
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+ if (MSR_TM_RESV(msr_hi))
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+ return 1;
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+ /* Pull in the MSR TM bits from the user context */
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+ regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr_hi & MSR_TS_MASK);
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/* Now, recheckpoint. This loads up all of the checkpointed (older)
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* registers, including FP and V[S]Rs. After recheckpointing, the
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* transactional versions should be loaded.
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@@ -884,11 +893,6 @@ static long restore_tm_user_regs(struct pt_regs *regs,
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current->thread.tm_texasr |= TEXASR_FS;
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/* This loads the checkpointed FP/VEC state, if used */
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tm_recheckpoint(¤t->thread, msr);
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- /* Get the top half of the MSR */
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- if (__get_user(msr_hi, &tm_sr->mc_gregs[PT_MSR]))
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- return 1;
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- /* Pull in MSR TM from user context */
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- regs->msr = (regs->msr & ~MSR_TS_MASK) | ((msr_hi<<32) & MSR_TS_MASK);
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/* This loads the speculative FP/VEC state, if used */
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if (msr & MSR_FP) {
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