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@@ -311,6 +311,36 @@ static const u16 brcmnand_regs_v60[] = {
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[BRCMNAND_FC_BASE] = 0x400,
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};
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+/* BRCMNAND v7.1 */
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+static const u16 brcmnand_regs_v71[] = {
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+ [BRCMNAND_CMD_START] = 0x04,
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+ [BRCMNAND_CMD_EXT_ADDRESS] = 0x08,
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+ [BRCMNAND_CMD_ADDRESS] = 0x0c,
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+ [BRCMNAND_INTFC_STATUS] = 0x14,
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+ [BRCMNAND_CS_SELECT] = 0x18,
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+ [BRCMNAND_CS_XOR] = 0x1c,
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+ [BRCMNAND_LL_OP] = 0x20,
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+ [BRCMNAND_CS0_BASE] = 0x50,
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+ [BRCMNAND_CS1_BASE] = 0,
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+ [BRCMNAND_CORR_THRESHOLD] = 0xdc,
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+ [BRCMNAND_CORR_THRESHOLD_EXT] = 0xe0,
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+ [BRCMNAND_UNCORR_COUNT] = 0xfc,
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+ [BRCMNAND_CORR_COUNT] = 0x100,
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+ [BRCMNAND_CORR_EXT_ADDR] = 0x10c,
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+ [BRCMNAND_CORR_ADDR] = 0x110,
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+ [BRCMNAND_UNCORR_EXT_ADDR] = 0x114,
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+ [BRCMNAND_UNCORR_ADDR] = 0x118,
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+ [BRCMNAND_SEMAPHORE] = 0x150,
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+ [BRCMNAND_ID] = 0x194,
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+ [BRCMNAND_ID_EXT] = 0x198,
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+ [BRCMNAND_LL_RDATA] = 0x19c,
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+ [BRCMNAND_OOB_READ_BASE] = 0x200,
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+ [BRCMNAND_OOB_READ_10_BASE] = 0,
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+ [BRCMNAND_OOB_WRITE_BASE] = 0x280,
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+ [BRCMNAND_OOB_WRITE_10_BASE] = 0,
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+ [BRCMNAND_FC_BASE] = 0x400,
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+};
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+
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enum brcmnand_cs_reg {
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BRCMNAND_CS_CFG_EXT = 0,
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BRCMNAND_CS_CFG,
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@@ -406,7 +436,9 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl)
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}
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/* Register offsets */
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- if (ctrl->nand_version >= 0x0600)
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+ if (ctrl->nand_version >= 0x0701)
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+ ctrl->reg_offsets = brcmnand_regs_v71;
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+ else if (ctrl->nand_version >= 0x0600)
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ctrl->reg_offsets = brcmnand_regs_v60;
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else if (ctrl->nand_version >= 0x0500)
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ctrl->reg_offsets = brcmnand_regs_v50;
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