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@@ -9,16 +9,17 @@
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* this archive for more details.
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* this archive for more details.
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*/
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*/
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+#include <linux/bcd.h>
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#include <linux/init.h>
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#include <linux/init.h>
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-#include <linux/module.h>
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+#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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-#include <linux/platform_device.h>
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+#include <linux/module.h>
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+#include <linux/of.h>
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#include <linux/rtc.h>
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#include <linux/rtc.h>
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-#include <linux/io.h>
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-#include <linux/bcd.h>
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+#include <linux/spi/spi.h>
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#define DRV_NAME "rtc-ds1302"
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#define DRV_NAME "rtc-ds1302"
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-#define DRV_VERSION "0.1.1"
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+#define DRV_VERSION "1.0.0"
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#define RTC_CMD_READ 0x81 /* Read command */
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#define RTC_CMD_READ 0x81 /* Read command */
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#define RTC_CMD_WRITE 0x80 /* Write command */
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#define RTC_CMD_WRITE 0x80 /* Write command */
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@@ -28,6 +29,8 @@
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#define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */
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#define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */
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#define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */
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#define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */
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+#define RTC_CLCK_BURST 0x1F /* Address of clock burst */
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+#define RTC_CLCK_LEN 0x08 /* Size of clock burst */
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#define RTC_ADDR_CTRL 0x07 /* Address of control register */
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#define RTC_ADDR_CTRL 0x07 /* Address of control register */
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#define RTC_ADDR_YEAR 0x06 /* Address of year register */
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#define RTC_ADDR_YEAR 0x06 /* Address of year register */
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#define RTC_ADDR_DAY 0x05 /* Address of day of week register */
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#define RTC_ADDR_DAY 0x05 /* Address of day of week register */
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@@ -37,217 +40,180 @@
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#define RTC_ADDR_MIN 0x01 /* Address of minute register */
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#define RTC_ADDR_MIN 0x01 /* Address of minute register */
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#define RTC_ADDR_SEC 0x00 /* Address of second register */
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#define RTC_ADDR_SEC 0x00 /* Address of second register */
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-#ifdef CONFIG_SH_SECUREEDGE5410
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-#include <asm/rtc.h>
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-#include <mach/secureedge5410.h>
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-
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-#define RTC_RESET 0x1000
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-#define RTC_IODATA 0x0800
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-#define RTC_SCLK 0x0400
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-
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-#define set_dp(x) SECUREEDGE_WRITE_IOPORT(x, 0x1c00)
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-#define get_dp() SECUREEDGE_READ_IOPORT()
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-#define ds1302_set_tx()
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-#define ds1302_set_rx()
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-
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-static inline int ds1302_hw_init(void)
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+static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *time)
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{
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{
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- return 0;
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+ struct spi_device *spi = dev_get_drvdata(dev);
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+ u8 buf[1 + RTC_CLCK_LEN];
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+ u8 *bp = buf;
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+ int status;
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+
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+ /* Enable writing */
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+ bp = buf;
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+ *bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;
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+ *bp++ = RTC_CMD_WRITE_ENABLE;
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+
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+ status = spi_write_then_read(spi, buf, 2,
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+ NULL, 0);
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+ if (!status)
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+ return status;
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+
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+ /* Write registers starting at the first time/date address. */
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+ bp = buf;
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+ *bp++ = RTC_CLCK_BURST << 1 | RTC_CMD_WRITE;
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+
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+ *bp++ = bin2bcd(time->tm_sec);
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+ *bp++ = bin2bcd(time->tm_min);
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+ *bp++ = bin2bcd(time->tm_hour);
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+ *bp++ = bin2bcd(time->tm_mday);
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+ *bp++ = bin2bcd(time->tm_mon + 1);
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+ *bp++ = time->tm_wday;
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+ *bp++ = bin2bcd(time->tm_year % 100);
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+ *bp++ = RTC_CMD_WRITE_DISABLE;
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+
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+ /* use write-then-read since dma from stack is nonportable */
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+ return spi_write_then_read(spi, buf, sizeof(buf),
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+ NULL, 0);
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}
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}
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-static inline void ds1302_reset(void)
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+static int ds1302_rtc_get_time(struct device *dev, struct rtc_time *time)
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{
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{
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- set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
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+ struct spi_device *spi = dev_get_drvdata(dev);
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+ u8 addr = RTC_CLCK_BURST << 1 | RTC_CMD_READ;
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+ u8 buf[RTC_CLCK_LEN - 1];
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+ int status;
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+
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+ /* Use write-then-read to get all the date/time registers
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+ * since dma from stack is nonportable
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+ */
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+ status = spi_write_then_read(spi, &addr, sizeof(addr),
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+ buf, sizeof(buf));
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+ if (status < 0)
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+ return status;
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+
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+ /* Decode the registers */
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+ time->tm_sec = bcd2bin(buf[RTC_ADDR_SEC]);
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+ time->tm_min = bcd2bin(buf[RTC_ADDR_MIN]);
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+ time->tm_hour = bcd2bin(buf[RTC_ADDR_HOUR]);
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+ time->tm_wday = buf[RTC_ADDR_DAY] - 1;
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+ time->tm_mday = bcd2bin(buf[RTC_ADDR_DATE]);
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+ time->tm_mon = bcd2bin(buf[RTC_ADDR_MON]) - 1;
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+ time->tm_year = bcd2bin(buf[RTC_ADDR_YEAR]) + 100;
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+
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+ /* Time may not be set */
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+ return rtc_valid_tm(time);
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}
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}
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-static inline void ds1302_clock(void)
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-{
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- set_dp(get_dp() | RTC_SCLK); /* clock high */
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- set_dp(get_dp() & ~RTC_SCLK); /* clock low */
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-}
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-
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-static inline void ds1302_start(void)
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-{
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- set_dp(get_dp() | RTC_RESET);
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-}
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-
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-static inline void ds1302_stop(void)
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-{
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- set_dp(get_dp() & ~RTC_RESET);
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-}
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-
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-static inline void ds1302_txbit(int bit)
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-{
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- set_dp((get_dp() & ~RTC_IODATA) | (bit ? RTC_IODATA : 0));
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-}
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-
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-static inline int ds1302_rxbit(void)
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-{
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- return !!(get_dp() & RTC_IODATA);
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-}
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-
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-#else
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-#error "Add support for your platform"
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-#endif
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+static struct rtc_class_ops ds1302_rtc_ops = {
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+ .read_time = ds1302_rtc_get_time,
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+ .set_time = ds1302_rtc_set_time,
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+};
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-static void ds1302_sendbits(unsigned int val)
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+static int ds1302_probe(struct spi_device *spi)
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{
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{
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- int i;
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-
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- ds1302_set_tx();
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-
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- for (i = 8; (i); i--, val >>= 1) {
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- ds1302_txbit(val & 0x1);
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- ds1302_clock();
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+ struct rtc_device *rtc;
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+ u8 addr;
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+ u8 buf[4];
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+ u8 *bp = buf;
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+ int status;
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+
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+ /* Sanity check board setup data. This may be hooked up
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+ * in 3wire mode, but we don't care. Note that unless
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+ * there's an inverter in place, this needs SPI_CS_HIGH!
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+ */
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+ if (spi->bits_per_word && (spi->bits_per_word != 8)) {
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+ dev_err(&spi->dev, "bad word length\n");
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+ return -EINVAL;
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+ } else if (spi->max_speed_hz > 2000000) {
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+ dev_err(&spi->dev, "speed is too high\n");
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+ return -EINVAL;
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+ } else if (spi->mode & SPI_CPHA) {
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+ dev_err(&spi->dev, "bad mode\n");
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+ return -EINVAL;
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}
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}
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-}
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-
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-static unsigned int ds1302_recvbits(void)
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-{
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- unsigned int val;
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- int i;
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-
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- ds1302_set_rx();
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- for (i = 0, val = 0; (i < 8); i++) {
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- val |= (ds1302_rxbit() << i);
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- ds1302_clock();
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+ addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ;
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+ status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
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+ if (status < 0) {
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+ dev_err(&spi->dev, "control register read error %d\n",
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+ status);
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+ return status;
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}
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}
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- return val;
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-}
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-
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-static unsigned int ds1302_readbyte(unsigned int addr)
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-{
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- unsigned int val;
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-
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- ds1302_reset();
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-
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- ds1302_start();
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- ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_READ);
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- val = ds1302_recvbits();
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- ds1302_stop();
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-
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- return val;
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-}
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-
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-static void ds1302_writebyte(unsigned int addr, unsigned int val)
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-{
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- ds1302_reset();
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-
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- ds1302_start();
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- ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_WRITE);
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- ds1302_sendbits(val);
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- ds1302_stop();
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-}
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-
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-static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm)
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-{
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- tm->tm_sec = bcd2bin(ds1302_readbyte(RTC_ADDR_SEC));
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- tm->tm_min = bcd2bin(ds1302_readbyte(RTC_ADDR_MIN));
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- tm->tm_hour = bcd2bin(ds1302_readbyte(RTC_ADDR_HOUR));
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- tm->tm_wday = bcd2bin(ds1302_readbyte(RTC_ADDR_DAY));
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- tm->tm_mday = bcd2bin(ds1302_readbyte(RTC_ADDR_DATE));
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- tm->tm_mon = bcd2bin(ds1302_readbyte(RTC_ADDR_MON)) - 1;
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- tm->tm_year = bcd2bin(ds1302_readbyte(RTC_ADDR_YEAR));
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-
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- if (tm->tm_year < 70)
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- tm->tm_year += 100;
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-
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- dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
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- "mday=%d, mon=%d, year=%d, wday=%d\n",
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- __func__,
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- tm->tm_sec, tm->tm_min, tm->tm_hour,
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- tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
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-
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- return rtc_valid_tm(tm);
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-}
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-
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-static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm)
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-{
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- ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_ENABLE);
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- /* Stop RTC */
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- ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80);
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-
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- ds1302_writebyte(RTC_ADDR_SEC, bin2bcd(tm->tm_sec));
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- ds1302_writebyte(RTC_ADDR_MIN, bin2bcd(tm->tm_min));
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- ds1302_writebyte(RTC_ADDR_HOUR, bin2bcd(tm->tm_hour));
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- ds1302_writebyte(RTC_ADDR_DAY, bin2bcd(tm->tm_wday));
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- ds1302_writebyte(RTC_ADDR_DATE, bin2bcd(tm->tm_mday));
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- ds1302_writebyte(RTC_ADDR_MON, bin2bcd(tm->tm_mon + 1));
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- ds1302_writebyte(RTC_ADDR_YEAR, bin2bcd(tm->tm_year % 100));
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+ if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {
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+ status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
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+ if (status < 0) {
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+ dev_err(&spi->dev, "control register read error %d\n",
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+ status);
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+ return status;
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+ }
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+
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+ if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {
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+ dev_err(&spi->dev, "junk in control register\n");
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+ return -ENODEV;
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+ }
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+ }
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+ if (buf[0] == 0) {
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+ bp = buf;
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+ *bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;
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+ *bp++ = RTC_CMD_WRITE_DISABLE;
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+
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+ status = spi_write_then_read(spi, buf, 2, NULL, 0);
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+ if (status < 0) {
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+ dev_err(&spi->dev, "control register write error %d\n",
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+ status);
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+ return status;
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+ }
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+
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+ addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ;
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+ status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
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+ if (status < 0) {
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+ dev_err(&spi->dev,
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+ "error %d reading control register\n",
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+ status);
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+ return status;
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+ }
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+
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+ if (buf[0] != RTC_CMD_WRITE_DISABLE) {
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+ dev_err(&spi->dev, "failed to detect chip\n");
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+ return -ENODEV;
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+ }
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+ }
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- /* Start RTC */
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- ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80);
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+ spi_set_drvdata(spi, spi);
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- ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_DISABLE);
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+ rtc = devm_rtc_device_register(&spi->dev, "ds1302",
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+ &ds1302_rtc_ops, THIS_MODULE);
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+ if (IS_ERR(rtc)) {
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+ status = PTR_ERR(rtc);
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+ dev_err(&spi->dev, "error %d registering rtc\n", status);
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+ return status;
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+ }
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return 0;
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return 0;
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}
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}
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-static int ds1302_rtc_ioctl(struct device *dev, unsigned int cmd,
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- unsigned long arg)
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+static int ds1302_remove(struct spi_device *spi)
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{
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{
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- switch (cmd) {
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-#ifdef RTC_SET_CHARGE
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- case RTC_SET_CHARGE:
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- {
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- int tcs_val;
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-
|
|
|
|
- if (copy_from_user(&tcs_val, (int __user *)arg, sizeof(int)))
|
|
|
|
- return -EFAULT;
|
|
|
|
-
|
|
|
|
- ds1302_writebyte(RTC_ADDR_TCR, (0xa0 | tcs_val * 0xf));
|
|
|
|
- return 0;
|
|
|
|
- }
|
|
|
|
-#endif
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- return -ENOIOCTLCMD;
|
|
|
|
|
|
+ spi_set_drvdata(spi, NULL);
|
|
|
|
+ return 0;
|
|
}
|
|
}
|
|
|
|
|
|
-static struct rtc_class_ops ds1302_rtc_ops = {
|
|
|
|
- .read_time = ds1302_rtc_read_time,
|
|
|
|
- .set_time = ds1302_rtc_set_time,
|
|
|
|
- .ioctl = ds1302_rtc_ioctl,
|
|
|
|
|
|
+#ifdef CONFIG_OF
|
|
|
|
+static const struct of_device_id ds1302_dt_ids[] = {
|
|
|
|
+ { .compatible = "maxim,ds1302", },
|
|
|
|
+ { /* sentinel */ }
|
|
};
|
|
};
|
|
|
|
+MODULE_DEVICE_TABLE(of, ds1302_dt_ids);
|
|
|
|
+#endif
|
|
|
|
|
|
-static int __init ds1302_rtc_probe(struct platform_device *pdev)
|
|
|
|
-{
|
|
|
|
- struct rtc_device *rtc;
|
|
|
|
-
|
|
|
|
- if (ds1302_hw_init()) {
|
|
|
|
- dev_err(&pdev->dev, "Failed to init communication channel");
|
|
|
|
- return -EINVAL;
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- /* Reset */
|
|
|
|
- ds1302_reset();
|
|
|
|
-
|
|
|
|
- /* Write a magic value to the DS1302 RAM, and see if it sticks. */
|
|
|
|
- ds1302_writebyte(RTC_ADDR_RAM0, 0x42);
|
|
|
|
- if (ds1302_readbyte(RTC_ADDR_RAM0) != 0x42) {
|
|
|
|
- dev_err(&pdev->dev, "Failed to probe");
|
|
|
|
- return -ENODEV;
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- rtc = devm_rtc_device_register(&pdev->dev, "ds1302",
|
|
|
|
- &ds1302_rtc_ops, THIS_MODULE);
|
|
|
|
- if (IS_ERR(rtc))
|
|
|
|
- return PTR_ERR(rtc);
|
|
|
|
-
|
|
|
|
- platform_set_drvdata(pdev, rtc);
|
|
|
|
-
|
|
|
|
- return 0;
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-static struct platform_driver ds1302_platform_driver = {
|
|
|
|
- .driver = {
|
|
|
|
- .name = DRV_NAME,
|
|
|
|
- },
|
|
|
|
|
|
+static struct spi_driver ds1302_driver = {
|
|
|
|
+ .driver.name = "rtc-ds1302",
|
|
|
|
+ .driver.of_match_table = of_match_ptr(ds1302_dt_ids),
|
|
|
|
+ .probe = ds1302_probe,
|
|
|
|
+ .remove = ds1302_remove,
|
|
};
|
|
};
|
|
|
|
|
|
-module_platform_driver_probe(ds1302_platform_driver, ds1302_rtc_probe);
|
|
|
|
|
|
+module_spi_driver(ds1302_driver);
|
|
|
|
|
|
MODULE_DESCRIPTION("Dallas DS1302 RTC driver");
|
|
MODULE_DESCRIPTION("Dallas DS1302 RTC driver");
|
|
MODULE_VERSION(DRV_VERSION);
|
|
MODULE_VERSION(DRV_VERSION);
|