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@@ -402,7 +402,7 @@ static int xgene_mii_phy_read(struct xgene_enet_pdata *pdata,
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return data;
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}
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-void xgene_gmac_set_mac_addr(struct xgene_enet_pdata *pdata)
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+static void xgene_gmac_set_mac_addr(struct xgene_enet_pdata *pdata)
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{
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u32 addr0, addr1;
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u8 *dev_addr = pdata->ndev->dev_addr;
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@@ -436,13 +436,13 @@ static int xgene_enet_ecc_init(struct xgene_enet_pdata *pdata)
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return 0;
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}
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-void xgene_gmac_reset(struct xgene_enet_pdata *pdata)
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+static void xgene_gmac_reset(struct xgene_enet_pdata *pdata)
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{
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xgene_enet_wr_mcx_mac(pdata, MAC_CONFIG_1_ADDR, SOFT_RESET1);
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xgene_enet_wr_mcx_mac(pdata, MAC_CONFIG_1_ADDR, 0);
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}
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-void xgene_gmac_init(struct xgene_enet_pdata *pdata, int speed)
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+static void xgene_gmac_init(struct xgene_enet_pdata *pdata)
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{
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u32 value, mc2;
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u32 intf_ctl, rgmii;
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@@ -456,7 +456,7 @@ void xgene_gmac_init(struct xgene_enet_pdata *pdata, int speed)
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xgene_enet_rd_mcx_mac(pdata, INTERFACE_CONTROL_ADDR, &intf_ctl);
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xgene_enet_rd_csr(pdata, RGMII_REG_0_ADDR, &rgmii);
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- switch (speed) {
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+ switch (pdata->phy_speed) {
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case SPEED_10:
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ENET_INTERFACE_MODE2_SET(&mc2, 1);
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CFG_MACMODE_SET(&icm0, 0);
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@@ -525,8 +525,8 @@ static void xgene_enet_config_ring_if_assoc(struct xgene_enet_pdata *pdata)
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xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIQMLITEFPQASSOC_ADDR, val);
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}
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-void xgene_enet_cle_bypass(struct xgene_enet_pdata *pdata,
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- u32 dst_ring_num, u16 bufpool_id)
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+static void xgene_enet_cle_bypass(struct xgene_enet_pdata *pdata,
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+ u32 dst_ring_num, u16 bufpool_id)
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{
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u32 cb;
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u32 fpsel;
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@@ -544,7 +544,7 @@ void xgene_enet_cle_bypass(struct xgene_enet_pdata *pdata,
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xgene_enet_wr_csr(pdata, CLE_BYPASS_REG1_0_ADDR, cb);
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}
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-void xgene_gmac_rx_enable(struct xgene_enet_pdata *pdata)
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+static void xgene_gmac_rx_enable(struct xgene_enet_pdata *pdata)
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{
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u32 data;
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@@ -552,7 +552,7 @@ void xgene_gmac_rx_enable(struct xgene_enet_pdata *pdata)
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xgene_enet_wr_mcx_mac(pdata, MAC_CONFIG_1_ADDR, data | RX_EN);
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}
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-void xgene_gmac_tx_enable(struct xgene_enet_pdata *pdata)
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+static void xgene_gmac_tx_enable(struct xgene_enet_pdata *pdata)
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{
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u32 data;
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@@ -560,7 +560,7 @@ void xgene_gmac_tx_enable(struct xgene_enet_pdata *pdata)
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xgene_enet_wr_mcx_mac(pdata, MAC_CONFIG_1_ADDR, data | TX_EN);
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}
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-void xgene_gmac_rx_disable(struct xgene_enet_pdata *pdata)
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+static void xgene_gmac_rx_disable(struct xgene_enet_pdata *pdata)
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{
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u32 data;
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@@ -568,7 +568,7 @@ void xgene_gmac_rx_disable(struct xgene_enet_pdata *pdata)
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xgene_enet_wr_mcx_mac(pdata, MAC_CONFIG_1_ADDR, data & ~RX_EN);
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}
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-void xgene_gmac_tx_disable(struct xgene_enet_pdata *pdata)
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+static void xgene_gmac_tx_disable(struct xgene_enet_pdata *pdata)
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{
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u32 data;
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@@ -576,7 +576,7 @@ void xgene_gmac_tx_disable(struct xgene_enet_pdata *pdata)
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xgene_enet_wr_mcx_mac(pdata, MAC_CONFIG_1_ADDR, data & ~TX_EN);
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}
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-void xgene_enet_reset(struct xgene_enet_pdata *pdata)
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+static void xgene_enet_reset(struct xgene_enet_pdata *pdata)
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{
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u32 val;
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@@ -593,7 +593,7 @@ void xgene_enet_reset(struct xgene_enet_pdata *pdata)
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xgene_enet_wr_mcx_mac(pdata, MII_MGMT_CONFIG_ADDR, val);
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}
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-void xgene_gport_shutdown(struct xgene_enet_pdata *pdata)
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+static void xgene_gport_shutdown(struct xgene_enet_pdata *pdata)
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{
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clk_disable_unprepare(pdata->clk);
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}
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@@ -627,10 +627,10 @@ static void xgene_enet_adjust_link(struct net_device *ndev)
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if (phydev->link) {
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if (pdata->phy_speed != phydev->speed) {
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- xgene_gmac_init(pdata, phydev->speed);
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+ pdata->phy_speed = phydev->speed;
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+ xgene_gmac_init(pdata);
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xgene_gmac_rx_enable(pdata);
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xgene_gmac_tx_enable(pdata);
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- pdata->phy_speed = phydev->speed;
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phy_print_status(phydev);
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}
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} else {
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@@ -726,3 +726,19 @@ void xgene_enet_mdio_remove(struct xgene_enet_pdata *pdata)
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mdiobus_free(pdata->mdio_bus);
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pdata->mdio_bus = NULL;
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}
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+
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+struct xgene_mac_ops xgene_gmac_ops = {
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+ .init = xgene_gmac_init,
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+ .reset = xgene_gmac_reset,
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+ .rx_enable = xgene_gmac_rx_enable,
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+ .tx_enable = xgene_gmac_tx_enable,
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+ .rx_disable = xgene_gmac_rx_disable,
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+ .tx_disable = xgene_gmac_tx_disable,
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+ .set_mac_addr = xgene_gmac_set_mac_addr,
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+};
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+
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+struct xgene_port_ops xgene_gport_ops = {
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+ .reset = xgene_enet_reset,
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+ .cle_bypass = xgene_enet_cle_bypass,
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+ .shutdown = xgene_gport_shutdown,
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+};
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