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@@ -10253,10 +10253,8 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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- enum transcoder cpu_transcoder;
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struct drm_display_mode *mode;
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struct intel_crtc_state *pipe_config;
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- u32 htot, hsync, vtot, vsync;
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enum pipe pipe = intel_crtc->pipe;
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mode = kzalloc(sizeof(*mode), GFP_KERNEL);
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@@ -10283,24 +10281,12 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
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pipe_config->dpll_hw_state.fp1 = I915_READ(FP1(pipe));
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i9xx_crtc_clock_get(intel_crtc, pipe_config);
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- mode->clock = pipe_config->port_clock / pipe_config->pixel_multiplier;
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-
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- cpu_transcoder = pipe_config->cpu_transcoder;
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- htot = I915_READ(HTOTAL(cpu_transcoder));
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- hsync = I915_READ(HSYNC(cpu_transcoder));
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- vtot = I915_READ(VTOTAL(cpu_transcoder));
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- vsync = I915_READ(VSYNC(cpu_transcoder));
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+ pipe_config->base.adjusted_mode.crtc_clock =
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+ pipe_config->port_clock / pipe_config->pixel_multiplier;
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- mode->hdisplay = (htot & 0xffff) + 1;
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- mode->htotal = ((htot & 0xffff0000) >> 16) + 1;
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- mode->hsync_start = (hsync & 0xffff) + 1;
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- mode->hsync_end = ((hsync & 0xffff0000) >> 16) + 1;
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- mode->vdisplay = (vtot & 0xffff) + 1;
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- mode->vtotal = ((vtot & 0xffff0000) >> 16) + 1;
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- mode->vsync_start = (vsync & 0xffff) + 1;
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- mode->vsync_end = ((vsync & 0xffff0000) >> 16) + 1;
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+ intel_get_pipe_timings(intel_crtc, pipe_config);
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- drm_mode_set_name(mode);
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+ intel_mode_from_pipe_config(mode, pipe_config);
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kfree(pipe_config);
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