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@@ -422,25 +422,24 @@ ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66); \
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/*
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* Entered with MSR[EE]=0 and no soft-masked interrupts pending.
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* r3 contains desired PSSCR register value.
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+ *
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+ * Offline (CPU unplug) case also must notify KVM that the CPU is
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+ * idle.
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*/
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_GLOBAL(power9_offline_stop)
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- std r3, PACA_REQ_PSSCR(r13)
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- mtspr SPRN_PSSCR,r3
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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- /* Tell KVM we're entering idle */
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+ /*
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+ * Tell KVM we're entering idle.
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+ * This does not have to be done in real mode because the P9 MMU
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+ * is independent per-thread. Some steppings share radix/hash mode
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+ * between threads, but in that case KVM has a barrier sync in real
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+ * mode before and after switching between radix and hash.
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+ */
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li r4,KVM_HWTHREAD_IN_IDLE
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- /* DO THIS IN REAL MODE! See comment above. */
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stb r4,HSTATE_HWTHREAD_STATE(r13)
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#endif
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- LOAD_REG_ADDR(r4,power_enter_stop)
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- b pnv_powersave_common
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- /* No return */
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+ /* fall through */
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-
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-/*
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- * Entered with MSR[EE]=0 and no soft-masked interrupts pending.
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- * r3 contains desired PSSCR register value.
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- */
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_GLOBAL(power9_idle_stop)
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std r3, PACA_REQ_PSSCR(r13)
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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