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@@ -277,6 +277,13 @@ void xgene_enet_wr_mac(struct xgene_enet_pdata *pdata, u32 wr_addr, u32 wr_data)
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u8 wait = 10;
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u32 done;
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+ if (pdata->mdio_driver && ndev->phydev &&
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+ pdata->phy_mode == PHY_INTERFACE_MODE_RGMII) {
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+ struct mii_bus *bus = ndev->phydev->mdio.bus;
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+
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+ return xgene_mdio_wr_mac(bus->priv, wr_addr, wr_data);
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+ }
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+
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addr = pdata->mcx_mac_addr + MAC_ADDR_REG_OFFSET;
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wr = pdata->mcx_mac_addr + MAC_WRITE_REG_OFFSET;
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cmd = pdata->mcx_mac_addr + MAC_COMMAND_REG_OFFSET;
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@@ -328,6 +335,13 @@ u32 xgene_enet_rd_mac(struct xgene_enet_pdata *pdata, u32 rd_addr)
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u32 done, rd_data;
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u8 wait = 10;
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+ if (pdata->mdio_driver && pdata->ndev->phydev &&
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+ pdata->phy_mode == PHY_INTERFACE_MODE_RGMII) {
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+ struct mii_bus *bus = pdata->ndev->phydev->mdio.bus;
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+
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+ return xgene_mdio_rd_mac(bus->priv, rd_addr);
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+ }
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+
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addr = pdata->mcx_mac_addr + MAC_ADDR_REG_OFFSET;
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rd = pdata->mcx_mac_addr + MAC_READ_REG_OFFSET;
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cmd = pdata->mcx_mac_addr + MAC_COMMAND_REG_OFFSET;
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