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@@ -251,14 +251,13 @@ again:
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if (dev)
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boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1,
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- 1 << IOMMU_PAGE_SHIFT_4K);
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+ 1 << tbl->it_page_shift);
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else
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- boundary_size = ALIGN(1UL << 32, 1 << IOMMU_PAGE_SHIFT_4K);
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+ boundary_size = ALIGN(1UL << 32, 1 << tbl->it_page_shift);
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/* 4GB boundary for iseries_hv_alloc and iseries_hv_map */
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- n = iommu_area_alloc(tbl->it_map, limit, start, npages,
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- tbl->it_offset, boundary_size >> IOMMU_PAGE_SHIFT_4K,
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- align_mask);
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+ n = iommu_area_alloc(tbl->it_map, limit, start, npages, tbl->it_offset,
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+ boundary_size >> tbl->it_page_shift, align_mask);
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if (n == -1) {
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if (likely(pass == 0)) {
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/* First try the pool from the start */
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@@ -320,12 +319,12 @@ static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl,
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return DMA_ERROR_CODE;
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entry += tbl->it_offset; /* Offset into real TCE table */
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- ret = entry << IOMMU_PAGE_SHIFT_4K; /* Set the return dma address */
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+ ret = entry << tbl->it_page_shift; /* Set the return dma address */
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/* Put the TCEs in the HW table */
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build_fail = ppc_md.tce_build(tbl, entry, npages,
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- (unsigned long)page & IOMMU_PAGE_MASK_4K,
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- direction, attrs);
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+ (unsigned long)page &
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+ IOMMU_PAGE_MASK(tbl), direction, attrs);
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/* ppc_md.tce_build() only returns non-zero for transient errors.
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* Clean up the table bitmap in this case and return
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@@ -352,7 +351,7 @@ static bool iommu_free_check(struct iommu_table *tbl, dma_addr_t dma_addr,
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{
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unsigned long entry, free_entry;
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- entry = dma_addr >> IOMMU_PAGE_SHIFT_4K;
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+ entry = dma_addr >> tbl->it_page_shift;
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free_entry = entry - tbl->it_offset;
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if (((free_entry + npages) > tbl->it_size) ||
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@@ -401,7 +400,7 @@ static void __iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
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unsigned long flags;
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struct iommu_pool *pool;
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- entry = dma_addr >> IOMMU_PAGE_SHIFT_4K;
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+ entry = dma_addr >> tbl->it_page_shift;
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free_entry = entry - tbl->it_offset;
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pool = get_pool(tbl, free_entry);
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@@ -468,13 +467,13 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
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}
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/* Allocate iommu entries for that segment */
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vaddr = (unsigned long) sg_virt(s);
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- npages = iommu_num_pages(vaddr, slen, IOMMU_PAGE_SIZE_4K);
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+ npages = iommu_num_pages(vaddr, slen, IOMMU_PAGE_SIZE(tbl));
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align = 0;
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- if (IOMMU_PAGE_SHIFT_4K < PAGE_SHIFT && slen >= PAGE_SIZE &&
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+ if (tbl->it_page_shift < PAGE_SHIFT && slen >= PAGE_SIZE &&
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(vaddr & ~PAGE_MASK) == 0)
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- align = PAGE_SHIFT - IOMMU_PAGE_SHIFT_4K;
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+ align = PAGE_SHIFT - tbl->it_page_shift;
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entry = iommu_range_alloc(dev, tbl, npages, &handle,
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- mask >> IOMMU_PAGE_SHIFT_4K, align);
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+ mask >> tbl->it_page_shift, align);
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DBG(" - vaddr: %lx, size: %lx\n", vaddr, slen);
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@@ -489,16 +488,16 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
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/* Convert entry to a dma_addr_t */
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entry += tbl->it_offset;
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- dma_addr = entry << IOMMU_PAGE_SHIFT_4K;
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- dma_addr |= (s->offset & ~IOMMU_PAGE_MASK_4K);
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+ dma_addr = entry << tbl->it_page_shift;
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+ dma_addr |= (s->offset & ~IOMMU_PAGE_MASK(tbl));
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DBG(" - %lu pages, entry: %lx, dma_addr: %lx\n",
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npages, entry, dma_addr);
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/* Insert into HW table */
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build_fail = ppc_md.tce_build(tbl, entry, npages,
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- vaddr & IOMMU_PAGE_MASK_4K,
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- direction, attrs);
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+ vaddr & IOMMU_PAGE_MASK(tbl),
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+ direction, attrs);
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if(unlikely(build_fail))
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goto failure;
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@@ -559,9 +558,9 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
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if (s->dma_length != 0) {
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unsigned long vaddr, npages;
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- vaddr = s->dma_address & IOMMU_PAGE_MASK_4K;
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+ vaddr = s->dma_address & IOMMU_PAGE_MASK(tbl);
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npages = iommu_num_pages(s->dma_address, s->dma_length,
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- IOMMU_PAGE_SIZE_4K);
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+ IOMMU_PAGE_SIZE(tbl));
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__iommu_free(tbl, vaddr, npages);
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s->dma_address = DMA_ERROR_CODE;
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s->dma_length = 0;
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@@ -592,7 +591,7 @@ void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
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if (sg->dma_length == 0)
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break;
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npages = iommu_num_pages(dma_handle, sg->dma_length,
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- IOMMU_PAGE_SIZE_4K);
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+ IOMMU_PAGE_SIZE(tbl));
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__iommu_free(tbl, dma_handle, npages);
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sg = sg_next(sg);
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}
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@@ -676,7 +675,7 @@ struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid)
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set_bit(0, tbl->it_map);
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/* We only split the IOMMU table if we have 1GB or more of space */
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- if ((tbl->it_size << IOMMU_PAGE_SHIFT_4K) >= (1UL * 1024 * 1024 * 1024))
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+ if ((tbl->it_size << tbl->it_page_shift) >= (1UL * 1024 * 1024 * 1024))
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tbl->nr_pools = IOMMU_NR_POOLS;
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else
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tbl->nr_pools = 1;
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@@ -768,16 +767,16 @@ dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
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vaddr = page_address(page) + offset;
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uaddr = (unsigned long)vaddr;
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- npages = iommu_num_pages(uaddr, size, IOMMU_PAGE_SIZE_4K);
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+ npages = iommu_num_pages(uaddr, size, IOMMU_PAGE_SIZE(tbl));
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if (tbl) {
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align = 0;
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- if (IOMMU_PAGE_SHIFT_4K < PAGE_SHIFT && size >= PAGE_SIZE &&
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+ if (tbl->it_page_shift < PAGE_SHIFT && size >= PAGE_SIZE &&
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((unsigned long)vaddr & ~PAGE_MASK) == 0)
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- align = PAGE_SHIFT - IOMMU_PAGE_SHIFT_4K;
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+ align = PAGE_SHIFT - tbl->it_page_shift;
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dma_handle = iommu_alloc(dev, tbl, vaddr, npages, direction,
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- mask >> IOMMU_PAGE_SHIFT_4K, align,
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+ mask >> tbl->it_page_shift, align,
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attrs);
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if (dma_handle == DMA_ERROR_CODE) {
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if (printk_ratelimit()) {
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@@ -786,7 +785,7 @@ dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
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npages);
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}
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} else
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- dma_handle |= (uaddr & ~IOMMU_PAGE_MASK_4K);
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+ dma_handle |= (uaddr & ~IOMMU_PAGE_MASK(tbl));
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}
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return dma_handle;
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@@ -801,7 +800,8 @@ void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle,
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BUG_ON(direction == DMA_NONE);
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if (tbl) {
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- npages = iommu_num_pages(dma_handle, size, IOMMU_PAGE_SIZE_4K);
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+ npages = iommu_num_pages(dma_handle, size,
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+ IOMMU_PAGE_SIZE(tbl));
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iommu_free(tbl, dma_handle, npages);
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}
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}
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@@ -845,10 +845,10 @@ void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
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memset(ret, 0, size);
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/* Set up tces to cover the allocated range */
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- nio_pages = size >> IOMMU_PAGE_SHIFT_4K;
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- io_order = get_iommu_order(size);
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+ nio_pages = size >> tbl->it_page_shift;
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+ io_order = get_iommu_order(size, tbl);
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mapping = iommu_alloc(dev, tbl, ret, nio_pages, DMA_BIDIRECTIONAL,
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- mask >> IOMMU_PAGE_SHIFT_4K, io_order, NULL);
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+ mask >> tbl->it_page_shift, io_order, NULL);
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if (mapping == DMA_ERROR_CODE) {
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free_pages((unsigned long)ret, order);
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return NULL;
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@@ -864,7 +864,7 @@ void iommu_free_coherent(struct iommu_table *tbl, size_t size,
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unsigned int nio_pages;
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size = PAGE_ALIGN(size);
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- nio_pages = size >> IOMMU_PAGE_SHIFT_4K;
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+ nio_pages = size >> tbl->it_page_shift;
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iommu_free(tbl, dma_handle, nio_pages);
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size = PAGE_ALIGN(size);
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free_pages((unsigned long)vaddr, get_order(size));
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@@ -935,10 +935,10 @@ int iommu_tce_clear_param_check(struct iommu_table *tbl,
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if (tce_value)
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return -EINVAL;
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- if (ioba & ~IOMMU_PAGE_MASK_4K)
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+ if (ioba & ~IOMMU_PAGE_MASK(tbl))
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return -EINVAL;
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- ioba >>= IOMMU_PAGE_SHIFT_4K;
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+ ioba >>= tbl->it_page_shift;
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if (ioba < tbl->it_offset)
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return -EINVAL;
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@@ -955,13 +955,13 @@ int iommu_tce_put_param_check(struct iommu_table *tbl,
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if (!(tce & (TCE_PCI_WRITE | TCE_PCI_READ)))
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return -EINVAL;
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- if (tce & ~(IOMMU_PAGE_MASK_4K | TCE_PCI_WRITE | TCE_PCI_READ))
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+ if (tce & ~(IOMMU_PAGE_MASK(tbl) | TCE_PCI_WRITE | TCE_PCI_READ))
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return -EINVAL;
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- if (ioba & ~IOMMU_PAGE_MASK_4K)
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+ if (ioba & ~IOMMU_PAGE_MASK(tbl))
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return -EINVAL;
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- ioba >>= IOMMU_PAGE_SHIFT_4K;
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+ ioba >>= tbl->it_page_shift;
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if (ioba < tbl->it_offset)
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return -EINVAL;
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@@ -1037,7 +1037,7 @@ int iommu_tce_build(struct iommu_table *tbl, unsigned long entry,
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/* if (unlikely(ret))
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pr_err("iommu_tce: %s failed on hwaddr=%lx ioba=%lx kva=%lx ret=%d\n",
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- __func__, hwaddr, entry << IOMMU_PAGE_SHIFT_4K,
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+ __func__, hwaddr, entry << IOMMU_PAGE_SHIFT(tbl),
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hwaddr, ret); */
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return ret;
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@@ -1049,14 +1049,14 @@ int iommu_put_tce_user_mode(struct iommu_table *tbl, unsigned long entry,
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{
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int ret;
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struct page *page = NULL;
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- unsigned long hwaddr, offset = tce & IOMMU_PAGE_MASK_4K & ~PAGE_MASK;
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+ unsigned long hwaddr, offset = tce & IOMMU_PAGE_MASK(tbl) & ~PAGE_MASK;
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enum dma_data_direction direction = iommu_tce_direction(tce);
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ret = get_user_pages_fast(tce & PAGE_MASK, 1,
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direction != DMA_TO_DEVICE, &page);
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if (unlikely(ret != 1)) {
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/* pr_err("iommu_tce: get_user_pages_fast failed tce=%lx ioba=%lx ret=%d\n",
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- tce, entry << IOMMU_PAGE_SHIFT_4K, ret); */
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+ tce, entry << IOMMU_PAGE_SHIFT(tbl), ret); */
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return -EFAULT;
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}
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hwaddr = (unsigned long) page_address(page) + offset;
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@@ -1067,7 +1067,7 @@ int iommu_put_tce_user_mode(struct iommu_table *tbl, unsigned long entry,
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if (ret < 0)
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pr_err("iommu_tce: %s failed ioba=%lx, tce=%lx, ret=%d\n",
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- __func__, entry << IOMMU_PAGE_SHIFT_4K, tce, ret);
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+ __func__, entry << tbl->it_page_shift, tce, ret);
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return ret;
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}
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@@ -1127,6 +1127,12 @@ int iommu_add_device(struct device *dev)
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pr_debug("iommu_tce: adding %s to iommu group %d\n",
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dev_name(dev), iommu_group_id(tbl->it_group));
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+ if (PAGE_SIZE < IOMMU_PAGE_SIZE(tbl)) {
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+ pr_err("iommu_tce: unsupported iommu page size.");
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+ pr_err("%s has not been added\n", dev_name(dev));
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+ return -EINVAL;
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+ }
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+
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ret = iommu_group_add_device(tbl->it_group, dev);
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if (ret < 0)
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pr_err("iommu_tce: %s has not been added, ret=%d\n",
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