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@@ -51,6 +51,7 @@ extern "C" {
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#define DRM_AMDGPU_GEM_OP 0x10
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#define DRM_AMDGPU_GEM_USERPTR 0x11
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#define DRM_AMDGPU_WAIT_FENCES 0x12
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+#define DRM_AMDGPU_VM 0x13
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#define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
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#define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
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@@ -65,6 +66,7 @@ extern "C" {
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#define DRM_IOCTL_AMDGPU_GEM_OP DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_OP, struct drm_amdgpu_gem_op)
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#define DRM_IOCTL_AMDGPU_GEM_USERPTR DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_USERPTR, struct drm_amdgpu_gem_userptr)
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#define DRM_IOCTL_AMDGPU_WAIT_FENCES DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_WAIT_FENCES, union drm_amdgpu_wait_fences)
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+#define DRM_IOCTL_AMDGPU_VM DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_VM, union drm_amdgpu_vm)
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#define AMDGPU_GEM_DOMAIN_CPU 0x1
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#define AMDGPU_GEM_DOMAIN_GTT 0x2
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@@ -190,6 +192,26 @@ union drm_amdgpu_ctx {
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union drm_amdgpu_ctx_out out;
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};
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+/* vm ioctl */
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+#define AMDGPU_VM_OP_RESERVE_VMID 1
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+#define AMDGPU_VM_OP_UNRESERVE_VMID 2
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+
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+struct drm_amdgpu_vm_in {
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+ /** AMDGPU_VM_OP_* */
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+ __u32 op;
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+ __u32 flags;
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+};
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+
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+struct drm_amdgpu_vm_out {
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+ /** For future use, no flags defined so far */
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+ __u64 flags;
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+};
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+
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+union drm_amdgpu_vm {
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+ struct drm_amdgpu_vm_in in;
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+ struct drm_amdgpu_vm_out out;
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+};
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+
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/*
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* This is not a reliable API and you should expect it to fail for any
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* number of reasons and have fallback path that do not use userptr to
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