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@@ -1001,6 +1001,14 @@ static void vce_v4_0_emit_vm_flush(struct amdgpu_ring *ring,
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amdgpu_ring_write(ring, 1 << vmid);
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}
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+static void vce_v4_0_emit_wreg(struct amdgpu_ring *ring,
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+ uint32_t reg, uint32_t val)
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+{
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+ amdgpu_ring_write(ring, VCE_CMD_REG_WRITE);
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+ amdgpu_ring_write(ring, reg << 2);
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+ amdgpu_ring_write(ring, val);
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+}
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+
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static int vce_v4_0_set_interrupt_state(struct amdgpu_device *adev,
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struct amdgpu_irq_src *source,
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unsigned type,
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@@ -1084,6 +1092,7 @@ static const struct amdgpu_ring_funcs vce_v4_0_ring_vm_funcs = {
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.pad_ib = amdgpu_ring_generic_pad_ib,
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.begin_use = amdgpu_vce_ring_begin_use,
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.end_use = amdgpu_vce_ring_end_use,
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+ .emit_wreg = vce_v4_0_emit_wreg,
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};
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static void vce_v4_0_set_ring_funcs(struct amdgpu_device *adev)
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