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@@ -57,12 +57,6 @@ MODULE_PARM_DESC(reset_mode, "0: auto, 1: warm only (default: 0)");
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#define ATH10K_PCI_TARGET_WAIT 3000
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#define ATH10K_PCI_NUM_WARM_RESET_ATTEMPTS 3
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-#define QCA988X_2_0_DEVICE_ID (0x003c)
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-#define QCA6164_2_1_DEVICE_ID (0x0041)
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-#define QCA6174_2_1_DEVICE_ID (0x003e)
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-#define QCA99X0_2_0_DEVICE_ID (0x0040)
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-#define QCA9377_1_0_DEVICE_ID (0x0042)
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-
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static const struct pci_device_id ath10k_pci_id_table[] = {
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{ PCI_VDEVICE(ATHEROS, QCA988X_2_0_DEVICE_ID) }, /* PCI-E QCA988X V2 */
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{ PCI_VDEVICE(ATHEROS, QCA6164_2_1_DEVICE_ID) }, /* PCI-E QCA6164 V2.1 */
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@@ -92,7 +86,9 @@ static const struct ath10k_pci_supp_chip ath10k_pci_supp_chips[] = {
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{ QCA6174_2_1_DEVICE_ID, QCA6174_HW_3_2_CHIP_ID_REV },
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{ QCA99X0_2_0_DEVICE_ID, QCA99X0_HW_2_0_CHIP_ID_REV },
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+
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{ QCA9377_1_0_DEVICE_ID, QCA9377_HW_1_0_CHIP_ID_REV },
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+ { QCA9377_1_0_DEVICE_ID, QCA9377_HW_1_1_CHIP_ID_REV },
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};
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static void ath10k_pci_buffer_cleanup(struct ath10k *ar);
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@@ -111,8 +107,9 @@ static void ath10k_pci_htc_tx_cb(struct ath10k_ce_pipe *ce_state);
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static void ath10k_pci_htc_rx_cb(struct ath10k_ce_pipe *ce_state);
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static void ath10k_pci_htt_tx_cb(struct ath10k_ce_pipe *ce_state);
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static void ath10k_pci_htt_rx_cb(struct ath10k_ce_pipe *ce_state);
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+static void ath10k_pci_htt_htc_rx_cb(struct ath10k_ce_pipe *ce_state);
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-static const struct ce_attr host_ce_config_wlan[] = {
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+static struct ce_attr host_ce_config_wlan[] = {
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/* CE0: host->target HTC control and raw streams */
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{
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.flags = CE_ATTR_FLAGS,
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@@ -128,7 +125,7 @@ static const struct ce_attr host_ce_config_wlan[] = {
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.src_nentries = 0,
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.src_sz_max = 2048,
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.dest_nentries = 512,
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- .recv_cb = ath10k_pci_htc_rx_cb,
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+ .recv_cb = ath10k_pci_htt_htc_rx_cb,
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},
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/* CE2: target->host WMI */
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@@ -217,7 +214,7 @@ static const struct ce_attr host_ce_config_wlan[] = {
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};
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/* Target firmware's Copy Engine configuration. */
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-static const struct ce_pipe_config target_ce_config_wlan[] = {
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+static struct ce_pipe_config target_ce_config_wlan[] = {
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/* CE0: host->target HTC control and raw streams */
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{
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.pipenum = __cpu_to_le32(0),
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@@ -330,7 +327,7 @@ static const struct ce_pipe_config target_ce_config_wlan[] = {
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* This table is derived from the CE_PCI TABLE, above.
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* It is passed to the Target at startup for use by firmware.
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*/
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-static const struct service_to_pipe target_service_to_ce_map_wlan[] = {
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+static struct service_to_pipe target_service_to_ce_map_wlan[] = {
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{
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__cpu_to_le32(ATH10K_HTC_SVC_ID_WMI_DATA_VO),
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__cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */
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@@ -1208,6 +1205,16 @@ static void ath10k_pci_htc_rx_cb(struct ath10k_ce_pipe *ce_state)
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ath10k_pci_process_rx_cb(ce_state, ath10k_htc_rx_completion_handler);
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}
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+static void ath10k_pci_htt_htc_rx_cb(struct ath10k_ce_pipe *ce_state)
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+{
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+ /* CE4 polling needs to be done whenever CE pipe which transports
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+ * HTT Rx (target->host) is processed.
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+ */
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+ ath10k_ce_per_engine_service(ce_state->ar, 4);
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+
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+ ath10k_pci_process_rx_cb(ce_state, ath10k_htc_rx_completion_handler);
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+}
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+
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/* Called by lower (CE) layer when a send to HTT Target completes. */
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static void ath10k_pci_htt_tx_cb(struct ath10k_ce_pipe *ce_state)
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{
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@@ -2027,6 +2034,29 @@ static int ath10k_pci_init_config(struct ath10k *ar)
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return 0;
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}
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+static void ath10k_pci_override_ce_config(struct ath10k *ar)
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+{
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+ struct ce_attr *attr;
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+ struct ce_pipe_config *config;
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+
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+ /* For QCA6174 we're overriding the Copy Engine 5 configuration,
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+ * since it is currently used for other feature.
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+ */
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+
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+ /* Override Host's Copy Engine 5 configuration */
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+ attr = &host_ce_config_wlan[5];
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+ attr->src_sz_max = 0;
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+ attr->dest_nentries = 0;
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+
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+ /* Override Target firmware's Copy Engine configuration */
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+ config = &target_ce_config_wlan[5];
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+ config->pipedir = __cpu_to_le32(PIPEDIR_OUT);
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+ config->nbytes_max = __cpu_to_le32(2048);
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+
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+ /* Map from service/endpoint to Copy Engine */
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+ target_service_to_ce_map_wlan[15].pipenum = __cpu_to_le32(1);
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+}
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+
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static int ath10k_pci_alloc_pipes(struct ath10k *ar)
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{
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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@@ -3020,6 +3050,9 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
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goto err_core_destroy;
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}
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+ if (QCA_REV_6174(ar))
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+ ath10k_pci_override_ce_config(ar);
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+
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ret = ath10k_pci_alloc_pipes(ar);
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if (ret) {
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ath10k_err(ar, "failed to allocate copy engine pipes: %d\n",
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Kalle Valo