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@@ -387,7 +387,7 @@ enum dma_residue_granularity {
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/* struct dma_slave_caps - expose capabilities of a slave channel only
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*
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* @src_addr_widths: bit mask of src addr widths the channel supports
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- * @dstn_addr_widths: bit mask of dstn addr widths the channel supports
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+ * @dst_addr_widths: bit mask of dstn addr widths the channel supports
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* @directions: bit mask of slave direction the channel supported
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* since the enum dma_transfer_direction is not defined as bits for each
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* type of direction, the dma controller should fill (1 << <TYPE>) and same
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@@ -398,7 +398,7 @@ enum dma_residue_granularity {
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*/
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struct dma_slave_caps {
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u32 src_addr_widths;
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- u32 dstn_addr_widths;
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+ u32 dst_addr_widths;
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u32 directions;
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bool cmd_pause;
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bool cmd_terminate;
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@@ -639,10 +639,10 @@ struct dma_device {
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void (*device_free_chan_resources)(struct dma_chan *chan);
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struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)(
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- struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
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+ struct dma_chan *chan, dma_addr_t dst, dma_addr_t src,
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size_t len, unsigned long flags);
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struct dma_async_tx_descriptor *(*device_prep_dma_xor)(
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- struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src,
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+ struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src,
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unsigned int src_cnt, size_t len, unsigned long flags);
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struct dma_async_tx_descriptor *(*device_prep_dma_xor_val)(
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struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt,
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