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@@ -185,14 +185,15 @@ static void print_pkt(unsigned char *buf, int len)
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print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, len);
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}
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-static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
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+static inline u32 stmmac_tx_avail(struct stmmac_priv *priv, u32 queue)
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{
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+ struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
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u32 avail;
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- if (priv->dirty_tx > priv->cur_tx)
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- avail = priv->dirty_tx - priv->cur_tx - 1;
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+ if (tx_q->dirty_tx > tx_q->cur_tx)
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+ avail = tx_q->dirty_tx - tx_q->cur_tx - 1;
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else
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- avail = DMA_TX_SIZE - priv->cur_tx + priv->dirty_tx - 1;
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+ avail = DMA_TX_SIZE - tx_q->cur_tx + tx_q->dirty_tx - 1;
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return avail;
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}
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@@ -238,9 +239,19 @@ static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv)
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*/
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static void stmmac_enable_eee_mode(struct stmmac_priv *priv)
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{
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+ u32 tx_cnt = priv->plat->tx_queues_to_use;
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+ u32 queue;
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+
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+ /* check if all TX queues have the work finished */
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+ for (queue = 0; queue < tx_cnt; queue++) {
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+ struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
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+
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+ if (tx_q->dirty_tx != tx_q->cur_tx)
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+ return; /* still unfinished work */
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+ }
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+
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/* Check and enter in LPI mode */
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- if ((priv->dirty_tx == priv->cur_tx) &&
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- (priv->tx_path_in_lpi_mode == false))
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+ if (!priv->tx_path_in_lpi_mode)
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priv->hw->mac->set_eee_mode(priv->hw,
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priv->plat->en_tx_lpi_clockgating);
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}
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@@ -919,15 +930,23 @@ static void stmmac_display_rx_rings(struct stmmac_priv *priv)
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static void stmmac_display_tx_rings(struct stmmac_priv *priv)
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{
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+ u32 tx_cnt = priv->plat->tx_queues_to_use;
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void *head_tx;
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+ u32 queue;
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- if (priv->extend_desc)
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- head_tx = (void *)priv->dma_etx;
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- else
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- head_tx = (void *)priv->dma_tx;
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+ /* Display TX rings */
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+ for (queue = 0; queue < tx_cnt; queue++) {
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+ struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
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- /* Display TX ring */
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- priv->hw->desc->display_ring(head_tx, DMA_TX_SIZE, false);
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+ pr_info("\tTX Queue %d rings\n", queue);
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+
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+ if (priv->extend_desc)
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+ head_tx = (void *)tx_q->dma_etx;
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+ else
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+ head_tx = (void *)tx_q->dma_tx;
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+
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+ priv->hw->desc->display_ring(head_tx, DMA_TX_SIZE, false);
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+ }
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}
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static void stmmac_display_rings(struct stmmac_priv *priv)
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@@ -982,21 +1001,23 @@ static void stmmac_clear_rx_descriptors(struct stmmac_priv *priv, u32 queue)
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/**
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* stmmac_clear_tx_descriptors - clear tx descriptors
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* @priv: driver private structure
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+ * @queue: TX queue index.
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* Description: this function is called to clear the TX descriptors
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* in case of both basic and extended descriptors are used.
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*/
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-static void stmmac_clear_tx_descriptors(struct stmmac_priv *priv)
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+static void stmmac_clear_tx_descriptors(struct stmmac_priv *priv, u32 queue)
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{
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+ struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
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int i;
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/* Clear the TX descriptors */
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for (i = 0; i < DMA_TX_SIZE; i++)
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if (priv->extend_desc)
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- priv->hw->desc->init_tx_desc(&priv->dma_etx[i].basic,
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+ priv->hw->desc->init_tx_desc(&tx_q->dma_etx[i].basic,
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priv->mode,
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(i == DMA_TX_SIZE - 1));
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else
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- priv->hw->desc->init_tx_desc(&priv->dma_tx[i],
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+ priv->hw->desc->init_tx_desc(&tx_q->dma_tx[i],
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priv->mode,
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(i == DMA_TX_SIZE - 1));
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}
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@@ -1010,6 +1031,7 @@ static void stmmac_clear_tx_descriptors(struct stmmac_priv *priv)
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static void stmmac_clear_descriptors(struct stmmac_priv *priv)
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{
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u32 rx_queue_cnt = priv->plat->rx_queues_to_use;
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+ u32 tx_queue_cnt = priv->plat->tx_queues_to_use;
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u32 queue;
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/* Clear the RX descriptors */
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@@ -1017,7 +1039,8 @@ static void stmmac_clear_descriptors(struct stmmac_priv *priv)
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stmmac_clear_rx_descriptors(priv, queue);
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/* Clear the TX descriptors */
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- stmmac_clear_tx_descriptors(priv);
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+ for (queue = 0; queue < tx_queue_cnt; queue++)
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+ stmmac_clear_tx_descriptors(priv, queue);
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}
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/**
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@@ -1085,28 +1108,31 @@ static void stmmac_free_rx_buffer(struct stmmac_priv *priv, u32 queue, int i)
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/**
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* stmmac_free_tx_buffer - free RX dma buffers
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* @priv: private structure
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+ * @queue: RX queue index
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* @i: buffer index.
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*/
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-static void stmmac_free_tx_buffer(struct stmmac_priv *priv, int i)
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+static void stmmac_free_tx_buffer(struct stmmac_priv *priv, u32 queue, int i)
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{
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- if (priv->tx_skbuff_dma[i].buf) {
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- if (priv->tx_skbuff_dma[i].map_as_page)
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+ struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
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+
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+ if (tx_q->tx_skbuff_dma[i].buf) {
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+ if (tx_q->tx_skbuff_dma[i].map_as_page)
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dma_unmap_page(priv->device,
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- priv->tx_skbuff_dma[i].buf,
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- priv->tx_skbuff_dma[i].len,
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+ tx_q->tx_skbuff_dma[i].buf,
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+ tx_q->tx_skbuff_dma[i].len,
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DMA_TO_DEVICE);
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else
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dma_unmap_single(priv->device,
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- priv->tx_skbuff_dma[i].buf,
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- priv->tx_skbuff_dma[i].len,
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+ tx_q->tx_skbuff_dma[i].buf,
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+ tx_q->tx_skbuff_dma[i].len,
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DMA_TO_DEVICE);
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}
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- if (priv->tx_skbuff[i]) {
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- dev_kfree_skb_any(priv->tx_skbuff[i]);
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- priv->tx_skbuff[i] = NULL;
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- priv->tx_skbuff_dma[i].buf = 0;
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- priv->tx_skbuff_dma[i].map_as_page = false;
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+ if (tx_q->tx_skbuff[i]) {
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+ dev_kfree_skb_any(tx_q->tx_skbuff[i]);
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+ tx_q->tx_skbuff[i] = NULL;
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+ tx_q->tx_skbuff_dma[i].buf = 0;
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+ tx_q->tx_skbuff_dma[i].map_as_page = false;
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}
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}
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@@ -1211,46 +1237,57 @@ err_init_rx_buffers:
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static int init_dma_tx_desc_rings(struct net_device *dev)
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{
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struct stmmac_priv *priv = netdev_priv(dev);
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+ u32 tx_queue_cnt = priv->plat->tx_queues_to_use;
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+ u32 queue;
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int i;
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- netif_dbg(priv, probe, priv->dev,
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- "(%s) dma_tx_phy=0x%08x\n", __func__, (u32)priv->dma_tx_phy);
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+ for (queue = 0; queue < tx_queue_cnt; queue++) {
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+ struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
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- /* Setup the chained descriptor addresses */
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- if (priv->mode == STMMAC_CHAIN_MODE) {
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- if (priv->extend_desc)
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- priv->hw->mode->init(priv->dma_etx, priv->dma_tx_phy,
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- DMA_TX_SIZE, 1);
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- else
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- priv->hw->mode->init(priv->dma_tx, priv->dma_tx_phy,
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- DMA_TX_SIZE, 0);
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- }
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+ netif_dbg(priv, probe, priv->dev,
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+ "(%s) dma_tx_phy=0x%08x\n", __func__,
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+ (u32)tx_q->dma_tx_phy);
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- for (i = 0; i < DMA_TX_SIZE; i++) {
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- struct dma_desc *p;
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- if (priv->extend_desc)
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- p = &((priv->dma_etx + i)->basic);
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- else
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- p = priv->dma_tx + i;
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+ /* Setup the chained descriptor addresses */
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+ if (priv->mode == STMMAC_CHAIN_MODE) {
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+ if (priv->extend_desc)
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+ priv->hw->mode->init(tx_q->dma_etx,
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+ tx_q->dma_tx_phy,
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+ DMA_TX_SIZE, 1);
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+ else
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+ priv->hw->mode->init(tx_q->dma_tx,
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+ tx_q->dma_tx_phy,
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+ DMA_TX_SIZE, 0);
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+ }
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- if (priv->synopsys_id >= DWMAC_CORE_4_00) {
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- p->des0 = 0;
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- p->des1 = 0;
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- p->des2 = 0;
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- p->des3 = 0;
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- } else {
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- p->des2 = 0;
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+ for (i = 0; i < DMA_TX_SIZE; i++) {
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+ struct dma_desc *p;
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+
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+ if (priv->extend_desc)
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+ p = &((tx_q->dma_etx + i)->basic);
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+ else
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+ p = tx_q->dma_tx + i;
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+
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+ if (priv->synopsys_id >= DWMAC_CORE_4_00) {
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+ p->des0 = 0;
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+ p->des1 = 0;
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+ p->des2 = 0;
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+ p->des3 = 0;
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+ } else {
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+ p->des2 = 0;
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+ }
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+
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+ tx_q->tx_skbuff_dma[i].buf = 0;
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+ tx_q->tx_skbuff_dma[i].map_as_page = false;
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+ tx_q->tx_skbuff_dma[i].len = 0;
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+ tx_q->tx_skbuff_dma[i].last_segment = false;
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+ tx_q->tx_skbuff[i] = NULL;
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}
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- priv->tx_skbuff_dma[i].buf = 0;
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- priv->tx_skbuff_dma[i].map_as_page = false;
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- priv->tx_skbuff_dma[i].len = 0;
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- priv->tx_skbuff_dma[i].last_segment = false;
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- priv->tx_skbuff[i] = NULL;
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+ tx_q->dirty_tx = 0;
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+ tx_q->cur_tx = 0;
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}
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- priv->dirty_tx = 0;
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- priv->cur_tx = 0;
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netdev_reset_queue(priv->dev);
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return 0;
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@@ -1299,13 +1336,14 @@ static void dma_free_rx_skbufs(struct stmmac_priv *priv, u32 queue)
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/**
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* dma_free_tx_skbufs - free TX dma buffers
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* @priv: private structure
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+ * @queue: TX queue index
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*/
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-static void dma_free_tx_skbufs(struct stmmac_priv *priv)
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+static void dma_free_tx_skbufs(struct stmmac_priv *priv, u32 queue)
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{
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int i;
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for (i = 0; i < DMA_TX_SIZE; i++)
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- stmmac_free_tx_buffer(priv, i);
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+ stmmac_free_tx_buffer(priv, queue, i);
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}
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/**
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@@ -1339,6 +1377,37 @@ static void free_dma_rx_desc_resources(struct stmmac_priv *priv)
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}
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}
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+/**
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+ * free_dma_tx_desc_resources - free TX dma desc resources
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+ * @priv: private structure
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+ */
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+static void free_dma_tx_desc_resources(struct stmmac_priv *priv)
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+{
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+ u32 tx_count = priv->plat->tx_queues_to_use;
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+ u32 queue = 0;
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+
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+ /* Free TX queue resources */
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+ for (queue = 0; queue < tx_count; queue++) {
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+ struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
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+
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+ /* Release the DMA TX socket buffers */
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+ dma_free_tx_skbufs(priv, queue);
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+
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+ /* Free DMA regions of consistent memory previously allocated */
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+ if (!priv->extend_desc)
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+ dma_free_coherent(priv->device,
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+ DMA_TX_SIZE * sizeof(struct dma_desc),
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+ tx_q->dma_tx, tx_q->dma_tx_phy);
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+ else
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+ dma_free_coherent(priv->device, DMA_TX_SIZE *
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+ sizeof(struct dma_extended_desc),
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+ tx_q->dma_etx, tx_q->dma_tx_phy);
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+
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+ kfree(tx_q->tx_skbuff_dma);
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+ kfree(tx_q->tx_skbuff);
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+ }
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+}
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+
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/**
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* alloc_dma_rx_desc_resources - alloc RX resources.
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* @priv: private structure
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@@ -1412,42 +1481,55 @@ err_dma:
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*/
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static int alloc_dma_tx_desc_resources(struct stmmac_priv *priv)
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{
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+ u32 tx_count = priv->plat->tx_queues_to_use;
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int ret = -ENOMEM;
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+ u32 queue;
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- priv->tx_skbuff_dma = kmalloc_array(DMA_TX_SIZE,
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- sizeof(*priv->tx_skbuff_dma),
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- GFP_KERNEL);
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- if (!priv->tx_skbuff_dma)
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- return -ENOMEM;
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+ /* TX queues buffers and DMA */
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+ for (queue = 0; queue < tx_count; queue++) {
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+ struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
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- priv->tx_skbuff = kmalloc_array(DMA_TX_SIZE, sizeof(struct sk_buff *),
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- GFP_KERNEL);
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- if (!priv->tx_skbuff)
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- goto err_tx_skbuff;
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+ tx_q->queue_index = queue;
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+ tx_q->priv_data = priv;
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- if (priv->extend_desc) {
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- priv->dma_etx = dma_zalloc_coherent(priv->device, DMA_TX_SIZE *
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- sizeof(struct
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- dma_extended_desc),
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- &priv->dma_tx_phy,
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+ tx_q->tx_skbuff_dma = kmalloc_array(DMA_TX_SIZE,
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+ sizeof(*tx_q->tx_skbuff_dma),
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GFP_KERNEL);
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- if (!priv->dma_etx)
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- goto err_dma;
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- } else {
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- priv->dma_tx = dma_zalloc_coherent(priv->device, DMA_TX_SIZE *
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- sizeof(struct dma_desc),
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- &priv->dma_tx_phy,
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- GFP_KERNEL);
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- if (!priv->dma_tx)
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- goto err_dma;
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+ if (!tx_q->tx_skbuff_dma)
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+ return -ENOMEM;
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+
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+ tx_q->tx_skbuff = kmalloc_array(DMA_TX_SIZE,
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+ sizeof(struct sk_buff *),
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+ GFP_KERNEL);
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+ if (!tx_q->tx_skbuff)
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+ goto err_dma_buffers;
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+
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+ if (priv->extend_desc) {
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+ tx_q->dma_etx = dma_zalloc_coherent(priv->device,
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+ DMA_TX_SIZE *
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+ sizeof(struct
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+ dma_extended_desc),
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+ &tx_q->dma_tx_phy,
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+ GFP_KERNEL);
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+ if (!tx_q->dma_etx)
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+ goto err_dma_buffers;
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+ } else {
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+ tx_q->dma_tx = dma_zalloc_coherent(priv->device,
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+ DMA_TX_SIZE *
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+ sizeof(struct
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+ dma_desc),
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+ &tx_q->dma_tx_phy,
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+ GFP_KERNEL);
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+ if (!tx_q->dma_tx)
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+ goto err_dma_buffers;
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+ }
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}
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return 0;
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|
|
-err_dma:
|
|
|
- kfree(priv->tx_skbuff);
|
|
|
-err_tx_skbuff:
|
|
|
- kfree(priv->tx_skbuff_dma);
|
|
|
+err_dma_buffers:
|
|
|
+ free_dma_tx_desc_resources(priv);
|
|
|
+
|
|
|
return ret;
|
|
|
}
|
|
|
|
|
@@ -1472,29 +1554,6 @@ static int alloc_dma_desc_resources(struct stmmac_priv *priv)
|
|
|
return ret;
|
|
|
}
|
|
|
|
|
|
-/**
|
|
|
- * free_dma_tx_desc_resources - free TX dma desc resources
|
|
|
- * @priv: private structure
|
|
|
- */
|
|
|
-static void free_dma_tx_desc_resources(struct stmmac_priv *priv)
|
|
|
-{
|
|
|
- /* Release the DMA TX socket buffers */
|
|
|
- dma_free_tx_skbufs(priv);
|
|
|
-
|
|
|
- /* Free DMA regions of consistent memory previously allocated */
|
|
|
- if (!priv->extend_desc)
|
|
|
- dma_free_coherent(priv->device,
|
|
|
- DMA_TX_SIZE * sizeof(struct dma_desc),
|
|
|
- priv->dma_tx, priv->dma_tx_phy);
|
|
|
- else
|
|
|
- dma_free_coherent(priv->device, DMA_TX_SIZE *
|
|
|
- sizeof(struct dma_extended_desc),
|
|
|
- priv->dma_etx, priv->dma_tx_phy);
|
|
|
-
|
|
|
- kfree(priv->tx_skbuff_dma);
|
|
|
- kfree(priv->tx_skbuff);
|
|
|
-}
|
|
|
-
|
|
|
/**
|
|
|
* free_dma_desc_resources - free dma desc resources
|
|
|
* @priv: private structure
|
|
@@ -1669,26 +1728,28 @@ static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
|
|
|
/**
|
|
|
* stmmac_tx_clean - to manage the transmission completion
|
|
|
* @priv: driver private structure
|
|
|
+ * @queue: TX queue index
|
|
|
* Description: it reclaims the transmit resources after transmission completes.
|
|
|
*/
|
|
|
-static void stmmac_tx_clean(struct stmmac_priv *priv)
|
|
|
+static void stmmac_tx_clean(struct stmmac_priv *priv, u32 queue)
|
|
|
{
|
|
|
+ struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
|
|
|
unsigned int bytes_compl = 0, pkts_compl = 0;
|
|
|
- unsigned int entry = priv->dirty_tx;
|
|
|
+ unsigned int entry = tx_q->dirty_tx;
|
|
|
|
|
|
netif_tx_lock(priv->dev);
|
|
|
|
|
|
priv->xstats.tx_clean++;
|
|
|
|
|
|
- while (entry != priv->cur_tx) {
|
|
|
- struct sk_buff *skb = priv->tx_skbuff[entry];
|
|
|
+ while (entry != tx_q->cur_tx) {
|
|
|
+ struct sk_buff *skb = tx_q->tx_skbuff[entry];
|
|
|
struct dma_desc *p;
|
|
|
int status;
|
|
|
|
|
|
if (priv->extend_desc)
|
|
|
- p = (struct dma_desc *)(priv->dma_etx + entry);
|
|
|
+ p = (struct dma_desc *)(tx_q->dma_etx + entry);
|
|
|
else
|
|
|
- p = priv->dma_tx + entry;
|
|
|
+ p = tx_q->dma_tx + entry;
|
|
|
|
|
|
status = priv->hw->desc->tx_status(&priv->dev->stats,
|
|
|
&priv->xstats, p,
|
|
@@ -1709,45 +1770,45 @@ static void stmmac_tx_clean(struct stmmac_priv *priv)
|
|
|
stmmac_get_tx_hwtstamp(priv, p, skb);
|
|
|
}
|
|
|
|
|
|
- if (likely(priv->tx_skbuff_dma[entry].buf)) {
|
|
|
- if (priv->tx_skbuff_dma[entry].map_as_page)
|
|
|
+ if (likely(tx_q->tx_skbuff_dma[entry].buf)) {
|
|
|
+ if (tx_q->tx_skbuff_dma[entry].map_as_page)
|
|
|
dma_unmap_page(priv->device,
|
|
|
- priv->tx_skbuff_dma[entry].buf,
|
|
|
- priv->tx_skbuff_dma[entry].len,
|
|
|
+ tx_q->tx_skbuff_dma[entry].buf,
|
|
|
+ tx_q->tx_skbuff_dma[entry].len,
|
|
|
DMA_TO_DEVICE);
|
|
|
else
|
|
|
dma_unmap_single(priv->device,
|
|
|
- priv->tx_skbuff_dma[entry].buf,
|
|
|
- priv->tx_skbuff_dma[entry].len,
|
|
|
+ tx_q->tx_skbuff_dma[entry].buf,
|
|
|
+ tx_q->tx_skbuff_dma[entry].len,
|
|
|
DMA_TO_DEVICE);
|
|
|
- priv->tx_skbuff_dma[entry].buf = 0;
|
|
|
- priv->tx_skbuff_dma[entry].len = 0;
|
|
|
- priv->tx_skbuff_dma[entry].map_as_page = false;
|
|
|
+ tx_q->tx_skbuff_dma[entry].buf = 0;
|
|
|
+ tx_q->tx_skbuff_dma[entry].len = 0;
|
|
|
+ tx_q->tx_skbuff_dma[entry].map_as_page = false;
|
|
|
}
|
|
|
|
|
|
if (priv->hw->mode->clean_desc3)
|
|
|
- priv->hw->mode->clean_desc3(priv, p);
|
|
|
+ priv->hw->mode->clean_desc3(tx_q, p);
|
|
|
|
|
|
- priv->tx_skbuff_dma[entry].last_segment = false;
|
|
|
- priv->tx_skbuff_dma[entry].is_jumbo = false;
|
|
|
+ tx_q->tx_skbuff_dma[entry].last_segment = false;
|
|
|
+ tx_q->tx_skbuff_dma[entry].is_jumbo = false;
|
|
|
|
|
|
if (likely(skb != NULL)) {
|
|
|
pkts_compl++;
|
|
|
bytes_compl += skb->len;
|
|
|
dev_consume_skb_any(skb);
|
|
|
- priv->tx_skbuff[entry] = NULL;
|
|
|
+ tx_q->tx_skbuff[entry] = NULL;
|
|
|
}
|
|
|
|
|
|
priv->hw->desc->release_tx_desc(p, priv->mode);
|
|
|
|
|
|
entry = STMMAC_GET_ENTRY(entry, DMA_TX_SIZE);
|
|
|
}
|
|
|
- priv->dirty_tx = entry;
|
|
|
+ tx_q->dirty_tx = entry;
|
|
|
|
|
|
netdev_completed_queue(priv->dev, pkts_compl, bytes_compl);
|
|
|
|
|
|
if (unlikely(netif_queue_stopped(priv->dev) &&
|
|
|
- stmmac_tx_avail(priv) > STMMAC_TX_THRESH)) {
|
|
|
+ stmmac_tx_avail(priv, queue) > STMMAC_TX_THRESH)) {
|
|
|
netif_dbg(priv, tx_done, priv->dev,
|
|
|
"%s: restart transmit\n", __func__);
|
|
|
netif_wake_queue(priv->dev);
|
|
@@ -1779,22 +1840,24 @@ static inline void stmmac_disable_dma_irq(struct stmmac_priv *priv, u32 chan)
|
|
|
*/
|
|
|
static void stmmac_tx_err(struct stmmac_priv *priv, u32 chan)
|
|
|
{
|
|
|
+ struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan];
|
|
|
int i;
|
|
|
+
|
|
|
netif_stop_queue(priv->dev);
|
|
|
|
|
|
stmmac_stop_tx_dma(priv, chan);
|
|
|
- dma_free_tx_skbufs(priv);
|
|
|
+ dma_free_tx_skbufs(priv, chan);
|
|
|
for (i = 0; i < DMA_TX_SIZE; i++)
|
|
|
if (priv->extend_desc)
|
|
|
- priv->hw->desc->init_tx_desc(&priv->dma_etx[i].basic,
|
|
|
+ priv->hw->desc->init_tx_desc(&tx_q->dma_etx[i].basic,
|
|
|
priv->mode,
|
|
|
(i == DMA_TX_SIZE - 1));
|
|
|
else
|
|
|
- priv->hw->desc->init_tx_desc(&priv->dma_tx[i],
|
|
|
+ priv->hw->desc->init_tx_desc(&tx_q->dma_tx[i],
|
|
|
priv->mode,
|
|
|
(i == DMA_TX_SIZE - 1));
|
|
|
- priv->dirty_tx = 0;
|
|
|
- priv->cur_tx = 0;
|
|
|
+ tx_q->dirty_tx = 0;
|
|
|
+ tx_q->cur_tx = 0;
|
|
|
netdev_reset_queue(priv->dev);
|
|
|
stmmac_start_tx_dma(priv, chan);
|
|
|
|
|
@@ -1983,6 +2046,7 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv)
|
|
|
u32 rx_channels_count = priv->plat->rx_queues_to_use;
|
|
|
u32 tx_channels_count = priv->plat->tx_queues_to_use;
|
|
|
struct stmmac_rx_queue *rx_q;
|
|
|
+ struct stmmac_tx_queue *tx_q;
|
|
|
u32 dummy_dma_rx_phy = 0;
|
|
|
u32 dummy_dma_tx_phy = 0;
|
|
|
u32 chan = 0;
|
|
@@ -2025,24 +2089,27 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv)
|
|
|
|
|
|
/* DMA TX Channel Configuration */
|
|
|
for (chan = 0; chan < tx_channels_count; chan++) {
|
|
|
+ tx_q = &priv->tx_queue[chan];
|
|
|
+
|
|
|
priv->hw->dma->init_chan(priv->ioaddr,
|
|
|
- priv->plat->dma_cfg,
|
|
|
- chan);
|
|
|
+ priv->plat->dma_cfg,
|
|
|
+ chan);
|
|
|
|
|
|
priv->hw->dma->init_tx_chan(priv->ioaddr,
|
|
|
priv->plat->dma_cfg,
|
|
|
- priv->dma_tx_phy, chan);
|
|
|
+ tx_q->dma_tx_phy, chan);
|
|
|
|
|
|
- priv->tx_tail_addr = priv->dma_tx_phy +
|
|
|
+ tx_q->tx_tail_addr = tx_q->dma_tx_phy +
|
|
|
(DMA_TX_SIZE * sizeof(struct dma_desc));
|
|
|
priv->hw->dma->set_tx_tail_ptr(priv->ioaddr,
|
|
|
- priv->tx_tail_addr,
|
|
|
+ tx_q->tx_tail_addr,
|
|
|
chan);
|
|
|
}
|
|
|
} else {
|
|
|
rx_q = &priv->rx_queue[chan];
|
|
|
+ tx_q = &priv->tx_queue[chan];
|
|
|
priv->hw->dma->init(priv->ioaddr, priv->plat->dma_cfg,
|
|
|
- priv->dma_tx_phy, rx_q->dma_rx_phy, atds);
|
|
|
+ tx_q->dma_tx_phy, rx_q->dma_rx_phy, atds);
|
|
|
}
|
|
|
|
|
|
if (priv->plat->axi && priv->hw->dma->axi)
|
|
@@ -2060,8 +2127,12 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv)
|
|
|
static void stmmac_tx_timer(unsigned long data)
|
|
|
{
|
|
|
struct stmmac_priv *priv = (struct stmmac_priv *)data;
|
|
|
+ u32 tx_queues_count = priv->plat->tx_queues_to_use;
|
|
|
+ u32 queue;
|
|
|
|
|
|
- stmmac_tx_clean(priv);
|
|
|
+ /* let's scan all the tx queues */
|
|
|
+ for (queue = 0; queue < tx_queues_count; queue++)
|
|
|
+ stmmac_tx_clean(priv, queue);
|
|
|
}
|
|
|
|
|
|
/**
|
|
@@ -2566,22 +2637,24 @@ static int stmmac_release(struct net_device *dev)
|
|
|
* @des: buffer start address
|
|
|
* @total_len: total length to fill in descriptors
|
|
|
* @last_segmant: condition for the last descriptor
|
|
|
+ * @queue: TX queue index
|
|
|
* Description:
|
|
|
* This function fills descriptor and request new descriptors according to
|
|
|
* buffer length to fill
|
|
|
*/
|
|
|
static void stmmac_tso_allocator(struct stmmac_priv *priv, unsigned int des,
|
|
|
- int total_len, bool last_segment)
|
|
|
+ int total_len, bool last_segment, u32 queue)
|
|
|
{
|
|
|
+ struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
|
|
|
struct dma_desc *desc;
|
|
|
- int tmp_len;
|
|
|
u32 buff_size;
|
|
|
+ int tmp_len;
|
|
|
|
|
|
tmp_len = total_len;
|
|
|
|
|
|
while (tmp_len > 0) {
|
|
|
- priv->cur_tx = STMMAC_GET_ENTRY(priv->cur_tx, DMA_TX_SIZE);
|
|
|
- desc = priv->dma_tx + priv->cur_tx;
|
|
|
+ tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, DMA_TX_SIZE);
|
|
|
+ desc = tx_q->dma_tx + tx_q->cur_tx;
|
|
|
|
|
|
desc->des0 = cpu_to_le32(des + (total_len - tmp_len));
|
|
|
buff_size = tmp_len >= TSO_MAX_BUFF_SIZE ?
|
|
@@ -2625,20 +2698,24 @@ static void stmmac_tso_allocator(struct stmmac_priv *priv, unsigned int des,
|
|
|
*/
|
|
|
static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)
|
|
|
{
|
|
|
- u32 pay_len, mss;
|
|
|
- int tmp_pay_len = 0;
|
|
|
+ struct dma_desc *desc, *first, *mss_desc = NULL;
|
|
|
struct stmmac_priv *priv = netdev_priv(dev);
|
|
|
int nfrags = skb_shinfo(skb)->nr_frags;
|
|
|
+ u32 queue = skb_get_queue_mapping(skb);
|
|
|
unsigned int first_entry, des;
|
|
|
- struct dma_desc *desc, *first, *mss_desc = NULL;
|
|
|
+ struct stmmac_tx_queue *tx_q;
|
|
|
+ int tmp_pay_len = 0;
|
|
|
+ u32 pay_len, mss;
|
|
|
u8 proto_hdr_len;
|
|
|
int i;
|
|
|
|
|
|
+ tx_q = &priv->tx_queue[queue];
|
|
|
+
|
|
|
/* Compute header lengths */
|
|
|
proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
|
|
|
|
|
|
/* Desc availability based on threshold should be enough safe */
|
|
|
- if (unlikely(stmmac_tx_avail(priv) <
|
|
|
+ if (unlikely(stmmac_tx_avail(priv, queue) <
|
|
|
(((skb->len - proto_hdr_len) / TSO_MAX_BUFF_SIZE + 1)))) {
|
|
|
if (!netif_queue_stopped(dev)) {
|
|
|
netif_stop_queue(dev);
|
|
@@ -2656,10 +2733,10 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)
|
|
|
|
|
|
/* set new MSS value if needed */
|
|
|
if (mss != priv->mss) {
|
|
|
- mss_desc = priv->dma_tx + priv->cur_tx;
|
|
|
+ mss_desc = tx_q->dma_tx + tx_q->cur_tx;
|
|
|
priv->hw->desc->set_mss(mss_desc, mss);
|
|
|
priv->mss = mss;
|
|
|
- priv->cur_tx = STMMAC_GET_ENTRY(priv->cur_tx, DMA_TX_SIZE);
|
|
|
+ tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, DMA_TX_SIZE);
|
|
|
}
|
|
|
|
|
|
if (netif_msg_tx_queued(priv)) {
|
|
@@ -2669,9 +2746,9 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)
|
|
|
skb->data_len);
|
|
|
}
|
|
|
|
|
|
- first_entry = priv->cur_tx;
|
|
|
+ first_entry = tx_q->cur_tx;
|
|
|
|
|
|
- desc = priv->dma_tx + first_entry;
|
|
|
+ desc = tx_q->dma_tx + first_entry;
|
|
|
first = desc;
|
|
|
|
|
|
/* first descriptor: fill Headers on Buf1 */
|
|
@@ -2680,9 +2757,9 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)
|
|
|
if (dma_mapping_error(priv->device, des))
|
|
|
goto dma_map_err;
|
|
|
|
|
|
- priv->tx_skbuff_dma[first_entry].buf = des;
|
|
|
- priv->tx_skbuff_dma[first_entry].len = skb_headlen(skb);
|
|
|
- priv->tx_skbuff[first_entry] = skb;
|
|
|
+ tx_q->tx_skbuff_dma[first_entry].buf = des;
|
|
|
+ tx_q->tx_skbuff_dma[first_entry].len = skb_headlen(skb);
|
|
|
+ tx_q->tx_skbuff[first_entry] = skb;
|
|
|
|
|
|
first->des0 = cpu_to_le32(des);
|
|
|
|
|
@@ -2693,7 +2770,7 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)
|
|
|
/* If needed take extra descriptors to fill the remaining payload */
|
|
|
tmp_pay_len = pay_len - TSO_MAX_BUFF_SIZE;
|
|
|
|
|
|
- stmmac_tso_allocator(priv, des, tmp_pay_len, (nfrags == 0));
|
|
|
+ stmmac_tso_allocator(priv, des, tmp_pay_len, (nfrags == 0), queue);
|
|
|
|
|
|
/* Prepare fragments */
|
|
|
for (i = 0; i < nfrags; i++) {
|
|
@@ -2706,19 +2783,19 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)
|
|
|
goto dma_map_err;
|
|
|
|
|
|
stmmac_tso_allocator(priv, des, skb_frag_size(frag),
|
|
|
- (i == nfrags - 1));
|
|
|
+ (i == nfrags - 1), queue);
|
|
|
|
|
|
- priv->tx_skbuff_dma[priv->cur_tx].buf = des;
|
|
|
- priv->tx_skbuff_dma[priv->cur_tx].len = skb_frag_size(frag);
|
|
|
- priv->tx_skbuff[priv->cur_tx] = NULL;
|
|
|
- priv->tx_skbuff_dma[priv->cur_tx].map_as_page = true;
|
|
|
+ tx_q->tx_skbuff_dma[tx_q->cur_tx].buf = des;
|
|
|
+ tx_q->tx_skbuff_dma[tx_q->cur_tx].len = skb_frag_size(frag);
|
|
|
+ tx_q->tx_skbuff[tx_q->cur_tx] = NULL;
|
|
|
+ tx_q->tx_skbuff_dma[tx_q->cur_tx].map_as_page = true;
|
|
|
}
|
|
|
|
|
|
- priv->tx_skbuff_dma[priv->cur_tx].last_segment = true;
|
|
|
+ tx_q->tx_skbuff_dma[tx_q->cur_tx].last_segment = true;
|
|
|
|
|
|
- priv->cur_tx = STMMAC_GET_ENTRY(priv->cur_tx, DMA_TX_SIZE);
|
|
|
+ tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, DMA_TX_SIZE);
|
|
|
|
|
|
- if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
|
|
|
+ if (unlikely(stmmac_tx_avail(priv, queue) <= (MAX_SKB_FRAGS + 1))) {
|
|
|
netif_dbg(priv, hw, priv->dev, "%s: stop transmitted packets\n",
|
|
|
__func__);
|
|
|
netif_stop_queue(dev);
|
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@@ -2753,7 +2830,7 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)
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priv->hw->desc->prepare_tso_tx_desc(first, 1,
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proto_hdr_len,
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pay_len,
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- 1, priv->tx_skbuff_dma[first_entry].last_segment,
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+ 1, tx_q->tx_skbuff_dma[first_entry].last_segment,
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tcp_hdrlen(skb) / 4, (skb->len - proto_hdr_len));
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/* If context desc is used to change MSS */
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@@ -2768,10 +2845,10 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)
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if (netif_msg_pktdata(priv)) {
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pr_info("%s: curr=%d dirty=%d f=%d, e=%d, f_p=%p, nfrags %d\n",
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- __func__, priv->cur_tx, priv->dirty_tx, first_entry,
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- priv->cur_tx, first, nfrags);
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+ __func__, tx_q->cur_tx, tx_q->dirty_tx, first_entry,
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+ tx_q->cur_tx, first, nfrags);
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- priv->hw->desc->display_ring((void *)priv->dma_tx, DMA_TX_SIZE,
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+ priv->hw->desc->display_ring((void *)tx_q->dma_tx, DMA_TX_SIZE,
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0);
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pr_info(">>> frame to be transmitted: ");
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@@ -2780,8 +2857,8 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)
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netdev_sent_queue(dev, skb->len);
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- priv->hw->dma->set_tx_tail_ptr(priv->ioaddr, priv->tx_tail_addr,
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- STMMAC_CHAN0);
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+ priv->hw->dma->set_tx_tail_ptr(priv->ioaddr, tx_q->tx_tail_addr,
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+ queue);
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return NETDEV_TX_OK;
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@@ -2805,19 +2882,23 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
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struct stmmac_priv *priv = netdev_priv(dev);
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unsigned int nopaged_len = skb_headlen(skb);
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int i, csum_insertion = 0, is_jumbo = 0;
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+ u32 queue = skb_get_queue_mapping(skb);
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int nfrags = skb_shinfo(skb)->nr_frags;
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unsigned int entry, first_entry;
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struct dma_desc *desc, *first;
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+ struct stmmac_tx_queue *tx_q;
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unsigned int enh_desc;
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unsigned int des;
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+ tx_q = &priv->tx_queue[queue];
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+
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/* Manage oversized TCP frames for GMAC4 device */
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if (skb_is_gso(skb) && priv->tso) {
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if (ip_hdr(skb)->protocol == IPPROTO_TCP)
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return stmmac_tso_xmit(skb, dev);
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}
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- if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
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+ if (unlikely(stmmac_tx_avail(priv, queue) < nfrags + 1)) {
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if (!netif_queue_stopped(dev)) {
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netif_stop_queue(dev);
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/* This is a hard error, log it. */
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@@ -2831,19 +2912,19 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
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if (priv->tx_path_in_lpi_mode)
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stmmac_disable_eee_mode(priv);
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- entry = priv->cur_tx;
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+ entry = tx_q->cur_tx;
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first_entry = entry;
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csum_insertion = (skb->ip_summed == CHECKSUM_PARTIAL);
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if (likely(priv->extend_desc))
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- desc = (struct dma_desc *)(priv->dma_etx + entry);
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+ desc = (struct dma_desc *)(tx_q->dma_etx + entry);
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else
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- desc = priv->dma_tx + entry;
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+ desc = tx_q->dma_tx + entry;
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first = desc;
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- priv->tx_skbuff[first_entry] = skb;
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+ tx_q->tx_skbuff[first_entry] = skb;
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enh_desc = priv->plat->enh_desc;
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/* To program the descriptors according to the size of the frame */
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@@ -2852,7 +2933,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
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if (unlikely(is_jumbo) && likely(priv->synopsys_id <
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DWMAC_CORE_4_00)) {
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- entry = priv->hw->mode->jumbo_frm(priv, skb, csum_insertion);
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+ entry = priv->hw->mode->jumbo_frm(tx_q, skb, csum_insertion);
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if (unlikely(entry < 0))
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goto dma_map_err;
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}
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@@ -2865,26 +2946,26 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
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entry = STMMAC_GET_ENTRY(entry, DMA_TX_SIZE);
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if (likely(priv->extend_desc))
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- desc = (struct dma_desc *)(priv->dma_etx + entry);
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+ desc = (struct dma_desc *)(tx_q->dma_etx + entry);
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else
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- desc = priv->dma_tx + entry;
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+ desc = tx_q->dma_tx + entry;
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des = skb_frag_dma_map(priv->device, frag, 0, len,
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DMA_TO_DEVICE);
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if (dma_mapping_error(priv->device, des))
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goto dma_map_err; /* should reuse desc w/o issues */
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- priv->tx_skbuff[entry] = NULL;
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+ tx_q->tx_skbuff[entry] = NULL;
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- priv->tx_skbuff_dma[entry].buf = des;
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+ tx_q->tx_skbuff_dma[entry].buf = des;
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if (unlikely(priv->synopsys_id >= DWMAC_CORE_4_00))
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desc->des0 = cpu_to_le32(des);
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else
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desc->des2 = cpu_to_le32(des);
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- priv->tx_skbuff_dma[entry].map_as_page = true;
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- priv->tx_skbuff_dma[entry].len = len;
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- priv->tx_skbuff_dma[entry].last_segment = last_segment;
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+ tx_q->tx_skbuff_dma[entry].map_as_page = true;
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+ tx_q->tx_skbuff_dma[entry].len = len;
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+ tx_q->tx_skbuff_dma[entry].last_segment = last_segment;
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/* Prepare the descriptor and set the own bit too */
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priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion,
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@@ -2893,20 +2974,20 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
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entry = STMMAC_GET_ENTRY(entry, DMA_TX_SIZE);
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- priv->cur_tx = entry;
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+ tx_q->cur_tx = entry;
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if (netif_msg_pktdata(priv)) {
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void *tx_head;
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netdev_dbg(priv->dev,
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"%s: curr=%d dirty=%d f=%d, e=%d, first=%p, nfrags=%d",
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- __func__, priv->cur_tx, priv->dirty_tx, first_entry,
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+ __func__, tx_q->cur_tx, tx_q->dirty_tx, first_entry,
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entry, first, nfrags);
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if (priv->extend_desc)
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- tx_head = (void *)priv->dma_etx;
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+ tx_head = (void *)tx_q->dma_etx;
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else
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- tx_head = (void *)priv->dma_tx;
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+ tx_head = (void *)tx_q->dma_tx;
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priv->hw->desc->display_ring(tx_head, DMA_TX_SIZE, false);
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@@ -2914,7 +2995,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
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print_pkt(skb->data, skb->len);
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}
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- if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
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+ if (unlikely(stmmac_tx_avail(priv, queue) <= (MAX_SKB_FRAGS + 1))) {
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netif_dbg(priv, hw, priv->dev, "%s: stop transmitted packets\n",
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__func__);
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netif_stop_queue(dev);
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@@ -2952,14 +3033,14 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
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if (dma_mapping_error(priv->device, des))
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goto dma_map_err;
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- priv->tx_skbuff_dma[first_entry].buf = des;
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+ tx_q->tx_skbuff_dma[first_entry].buf = des;
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if (unlikely(priv->synopsys_id >= DWMAC_CORE_4_00))
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first->des0 = cpu_to_le32(des);
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else
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first->des2 = cpu_to_le32(des);
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- priv->tx_skbuff_dma[first_entry].len = nopaged_len;
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- priv->tx_skbuff_dma[first_entry].last_segment = last_segment;
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+ tx_q->tx_skbuff_dma[first_entry].len = nopaged_len;
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+ tx_q->tx_skbuff_dma[first_entry].last_segment = last_segment;
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if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
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priv->hwts_tx_en)) {
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@@ -2985,8 +3066,8 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
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if (priv->synopsys_id < DWMAC_CORE_4_00)
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priv->hw->dma->enable_dma_transmission(priv->ioaddr);
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else
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- priv->hw->dma->set_tx_tail_ptr(priv->ioaddr, priv->tx_tail_addr,
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- STMMAC_CHAN0);
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+ priv->hw->dma->set_tx_tail_ptr(priv->ioaddr, tx_q->tx_tail_addr,
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+ queue);
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return NETDEV_TX_OK;
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@@ -3306,12 +3387,18 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
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static int stmmac_poll(struct napi_struct *napi, int budget)
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{
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struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
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+ u32 tx_count = priv->plat->tx_queues_to_use;
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u32 chan = STMMAC_CHAN0;
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int work_done = 0;
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u32 queue = chan;
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priv->xstats.napi_poll++;
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- stmmac_tx_clean(priv);
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+
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+ /* check all the queues */
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+ for (queue = 0; queue < tx_count; queue++)
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+ stmmac_tx_clean(priv, queue);
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+
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+ queue = chan;
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work_done = stmmac_rx(priv, budget, queue);
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if (work_done < budget) {
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@@ -3332,10 +3419,12 @@ static int stmmac_poll(struct napi_struct *napi, int budget)
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static void stmmac_tx_timeout(struct net_device *dev)
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{
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struct stmmac_priv *priv = netdev_priv(dev);
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- u32 chan = STMMAC_CHAN0;
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+ u32 tx_count = priv->plat->tx_queues_to_use;
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+ u32 chan;
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/* Clear Tx resources and restart transmitting again */
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- stmmac_tx_err(priv, chan);
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+ for (chan = 0; chan < tx_count; chan++)
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+ stmmac_tx_err(priv, chan);
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}
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/**
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@@ -3585,6 +3674,7 @@ static int stmmac_sysfs_ring_read(struct seq_file *seq, void *v)
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struct net_device *dev = seq->private;
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struct stmmac_priv *priv = netdev_priv(dev);
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u32 rx_count = priv->plat->rx_queues_to_use;
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+ u32 tx_count = priv->plat->tx_queues_to_use;
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u32 queue;
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for (queue = 0; queue < rx_count; queue++) {
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@@ -3603,12 +3693,20 @@ static int stmmac_sysfs_ring_read(struct seq_file *seq, void *v)
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}
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}
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- if (priv->extend_desc) {
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- seq_printf(seq, "Extended TX descriptor ring:\n");
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- sysfs_display_ring((void *)priv->dma_etx, DMA_TX_SIZE, 1, seq);
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- } else {
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- seq_printf(seq, "TX descriptor ring:\n");
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- sysfs_display_ring((void *)priv->dma_tx, DMA_TX_SIZE, 0, seq);
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+ for (queue = 0; queue < tx_count; queue++) {
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+ struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
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+
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+ seq_printf(seq, "TX Queue %d:\n", queue);
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+
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+ if (priv->extend_desc) {
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+ seq_printf(seq, "Extended descriptor ring:\n");
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+ sysfs_display_ring((void *)tx_q->dma_etx,
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+ DMA_TX_SIZE, 1, seq);
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+ } else {
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+ seq_printf(seq, "Descriptor ring:\n");
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+ sysfs_display_ring((void *)tx_q->dma_tx,
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+ DMA_TX_SIZE, 0, seq);
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+ }
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}
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return 0;
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@@ -4127,6 +4225,7 @@ EXPORT_SYMBOL_GPL(stmmac_suspend);
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static void stmmac_reset_queues_param(struct stmmac_priv *priv)
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{
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u32 rx_cnt = priv->plat->rx_queues_to_use;
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+ u32 tx_cnt = priv->plat->tx_queues_to_use;
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u32 queue;
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for (queue = 0; queue < rx_cnt; queue++) {
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@@ -4136,8 +4235,12 @@ static void stmmac_reset_queues_param(struct stmmac_priv *priv)
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rx_q->dirty_rx = 0;
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}
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- priv->dirty_tx = 0;
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- priv->cur_tx = 0;
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+ for (queue = 0; queue < tx_cnt; queue++) {
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+ struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
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+
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+ tx_q->cur_tx = 0;
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+ tx_q->dirty_tx = 0;
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+ }
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}
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/**
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