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@@ -61,6 +61,12 @@ enum orion_spi_type {
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struct orion_spi_dev {
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enum orion_spi_type typ;
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+ /*
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+ * min_divisor and max_hz should be exclusive, the only we can
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+ * have both is for managing the armada-370-spi case with old
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+ * device tree
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+ */
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+ unsigned long max_hz;
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unsigned int min_divisor;
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unsigned int max_divisor;
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u32 prescale_mask;
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@@ -387,8 +393,9 @@ static const struct orion_spi_dev orion_spi_dev_data = {
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static const struct orion_spi_dev armada_spi_dev_data = {
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.typ = ARMADA_SPI,
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- .min_divisor = 1,
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+ .min_divisor = 4,
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.max_divisor = 1920,
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+ .max_hz = 50000000,
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.prescale_mask = ARMADA_SPI_CLK_PRESCALE_MASK,
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};
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@@ -454,7 +461,21 @@ static int orion_spi_probe(struct platform_device *pdev)
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goto out;
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tclk_hz = clk_get_rate(spi->clk);
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- master->max_speed_hz = DIV_ROUND_UP(tclk_hz, devdata->min_divisor);
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+
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+ /*
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+ * With old device tree, armada-370-spi could be used with
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+ * Armada XP, however for this SoC the maximum frequency is
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+ * 50MHz instead of tclk/4. On Armada 370, tclk cannot be
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+ * higher than 200MHz. So, in order to be able to handle both
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+ * SoCs, we can take the minimum of 50MHz and tclk/4.
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+ */
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+ if (of_device_is_compatible(pdev->dev.of_node,
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+ "marvell,armada-370-spi"))
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+ master->max_speed_hz = min(devdata->max_hz,
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+ DIV_ROUND_UP(tclk_hz, devdata->min_divisor));
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+ else
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+ master->max_speed_hz =
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+ DIV_ROUND_UP(tclk_hz, devdata->min_divisor);
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master->min_speed_hz = DIV_ROUND_UP(tclk_hz, devdata->max_divisor);
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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