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@@ -107,6 +107,8 @@ static void skl_init_scalers(struct drm_device *dev, struct intel_crtc *intel_cr
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struct intel_crtc_state *crtc_state);
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static int i9xx_get_refclk(const struct intel_crtc_state *crtc_state,
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int num_connectors);
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+static void intel_crtc_enable_planes(struct drm_crtc *crtc);
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+static void intel_crtc_disable_planes(struct drm_crtc *crtc);
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static struct intel_encoder *intel_find_encoder(struct intel_connector *connector, int pipe)
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{
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@@ -3206,6 +3208,19 @@ static void intel_update_primary_planes(struct drm_device *dev)
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}
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}
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+void intel_crtc_reset(struct intel_crtc *crtc)
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+{
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+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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+
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+ if (!crtc->active)
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+ return;
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+
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+ intel_crtc_disable_planes(&crtc->base);
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+ dev_priv->display.crtc_disable(&crtc->base);
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+ dev_priv->display.crtc_enable(&crtc->base);
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+ intel_crtc_enable_planes(&crtc->base);
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+}
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+
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void intel_prepare_reset(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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@@ -3226,8 +3241,11 @@ void intel_prepare_reset(struct drm_device *dev)
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* g33 docs say we should at least disable all the planes.
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*/
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for_each_intel_crtc(dev, crtc) {
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- if (crtc->active)
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- dev_priv->display.crtc_disable(&crtc->base);
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+ if (!crtc->active)
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+ continue;
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+
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+ intel_crtc_disable_planes(&crtc->base);
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+ dev_priv->display.crtc_disable(&crtc->base);
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}
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}
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@@ -4842,8 +4860,6 @@ intel_pre_disable_primary(struct drm_crtc *crtc)
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static void intel_crtc_enable_planes(struct drm_crtc *crtc)
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{
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- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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-
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intel_enable_primary_hw_plane(crtc->primary, crtc);
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intel_enable_sprite_planes(crtc);
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intel_crtc_update_cursor(crtc, true);
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@@ -4949,8 +4965,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
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if (HAS_PCH_CPT(dev))
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cpt_verify_modeset(dev, intel_crtc->pipe);
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-
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- intel_crtc_enable_planes(crtc);
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}
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/* IPS only exists on ULT machines and is tied to pipe A. */
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@@ -5074,7 +5088,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
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/* If we change the relative order between pipe/planes enabling, we need
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* to change the workaround. */
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haswell_mode_set_planes_workaround(intel_crtc);
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- intel_crtc_enable_planes(crtc);
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}
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static void ironlake_pfit_disable(struct intel_crtc *crtc)
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@@ -5104,8 +5117,6 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
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if (!intel_crtc->active)
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return;
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- intel_crtc_disable_planes(crtc);
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-
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for_each_encoder_on_crtc(dev, crtc, encoder)
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encoder->disable(encoder);
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@@ -5168,8 +5179,6 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
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if (!intel_crtc->active)
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return;
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- intel_crtc_disable_planes(crtc);
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-
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for_each_encoder_on_crtc(dev, crtc, encoder) {
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intel_opregion_notify_encoder(encoder, false);
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encoder->disable(encoder);
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@@ -5917,8 +5926,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
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for_each_encoder_on_crtc(dev, crtc, encoder)
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encoder->enable(encoder);
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-
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- intel_crtc_enable_planes(crtc);
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}
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static void i9xx_set_pll_dividers(struct intel_crtc *crtc)
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@@ -5975,8 +5982,6 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
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for_each_encoder_on_crtc(dev, crtc, encoder)
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encoder->enable(encoder);
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-
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- intel_crtc_enable_planes(crtc);
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}
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static void i9xx_pfit_disable(struct intel_crtc *crtc)
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@@ -6005,8 +6010,6 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
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if (!intel_crtc->active)
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return;
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- intel_crtc_disable_planes(crtc);
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-
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/*
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* On gen2 planes are double buffered but the pipe isn't, so we must
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* wait for planes to fully turn off before disabling the pipe.
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@@ -6070,9 +6073,11 @@ void intel_crtc_control(struct drm_crtc *crtc, bool enable)
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intel_crtc->enabled_power_domains = domains;
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dev_priv->display.crtc_enable(crtc);
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+ intel_crtc_enable_planes(crtc);
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}
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} else {
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if (intel_crtc->active) {
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+ intel_crtc_disable_planes(crtc);
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dev_priv->display.crtc_disable(crtc);
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domains = intel_crtc->enabled_power_domains;
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@@ -6107,6 +6112,7 @@ static void intel_crtc_disable(struct drm_crtc *crtc)
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/* crtc should still be enabled when we disable it. */
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WARN_ON(!crtc->state->enable);
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+ intel_crtc_disable_planes(crtc);
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dev_priv->display.crtc_disable(crtc);
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dev_priv->display.off(crtc);
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@@ -12346,8 +12352,10 @@ static int __intel_set_mode(struct drm_crtc *crtc,
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intel_crtc_disable(&intel_crtc->base);
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for_each_intel_crtc_masked(dev, prepare_pipes, intel_crtc) {
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- if (intel_crtc->base.state->enable)
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+ if (intel_crtc->base.state->enable) {
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+ intel_crtc_disable_planes(&intel_crtc->base);
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dev_priv->display.crtc_disable(&intel_crtc->base);
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+ }
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}
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/* crtc->mode is already used by the ->mode_set callbacks, hence we need
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@@ -12395,6 +12403,7 @@ static int __intel_set_mode(struct drm_crtc *crtc,
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update_scanline_offset(intel_crtc);
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dev_priv->display.crtc_enable(&intel_crtc->base);
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+ intel_crtc_enable_planes(&intel_crtc->base);
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}
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/* FIXME: add subpixel order */
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@@ -14839,6 +14848,7 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc)
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plane = crtc->plane;
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to_intel_plane_state(crtc->base.primary->state)->visible = true;
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crtc->plane = !plane;
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+ intel_crtc_disable_planes(&crtc->base);
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dev_priv->display.crtc_disable(&crtc->base);
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crtc->plane = plane;
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