|
@@ -2863,9 +2863,7 @@ static struct iommu_domain *amd_iommu_domain_alloc(unsigned type)
|
|
static void amd_iommu_domain_free(struct iommu_domain *dom)
|
|
static void amd_iommu_domain_free(struct iommu_domain *dom)
|
|
{
|
|
{
|
|
struct protection_domain *domain;
|
|
struct protection_domain *domain;
|
|
-
|
|
|
|
- if (!dom)
|
|
|
|
- return;
|
|
|
|
|
|
+ struct dma_ops_domain *dma_dom;
|
|
|
|
|
|
domain = to_pdomain(dom);
|
|
domain = to_pdomain(dom);
|
|
|
|
|
|
@@ -2874,13 +2872,24 @@ static void amd_iommu_domain_free(struct iommu_domain *dom)
|
|
|
|
|
|
BUG_ON(domain->dev_cnt != 0);
|
|
BUG_ON(domain->dev_cnt != 0);
|
|
|
|
|
|
- if (domain->mode != PAGE_MODE_NONE)
|
|
|
|
- free_pagetable(domain);
|
|
|
|
|
|
+ if (!dom)
|
|
|
|
+ return;
|
|
|
|
|
|
- if (domain->flags & PD_IOMMUV2_MASK)
|
|
|
|
- free_gcr3_table(domain);
|
|
|
|
|
|
+ switch (dom->type) {
|
|
|
|
+ case IOMMU_DOMAIN_DMA:
|
|
|
|
+ dma_dom = domain->priv;
|
|
|
|
+ dma_ops_domain_free(dma_dom);
|
|
|
|
+ break;
|
|
|
|
+ default:
|
|
|
|
+ if (domain->mode != PAGE_MODE_NONE)
|
|
|
|
+ free_pagetable(domain);
|
|
|
|
|
|
- protection_domain_free(domain);
|
|
|
|
|
|
+ if (domain->flags & PD_IOMMUV2_MASK)
|
|
|
|
+ free_gcr3_table(domain);
|
|
|
|
+
|
|
|
|
+ protection_domain_free(domain);
|
|
|
|
+ break;
|
|
|
|
+ }
|
|
}
|
|
}
|
|
|
|
|
|
static void amd_iommu_detach_device(struct iommu_domain *dom,
|
|
static void amd_iommu_detach_device(struct iommu_domain *dom,
|