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@@ -18,22 +18,13 @@
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#define pr_fmt(fmt) "fsl-pamu: %s: " fmt, __func__
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-#include <linux/init.h>
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-#include <linux/iommu.h>
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-#include <linux/slab.h>
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-#include <linux/module.h>
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-#include <linux/types.h>
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-#include <linux/mm.h>
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+#include "fsl_pamu.h"
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+
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#include <linux/interrupt.h>
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-#include <linux/device.h>
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-#include <linux/of_platform.h>
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-#include <linux/bootmem.h>
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#include <linux/genalloc.h>
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-#include <asm/io.h>
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-#include <asm/bitops.h>
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-#include <asm/fsl_guts.h>
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-#include "fsl_pamu.h"
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+#include <asm/mpc85xx.h>
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+#include <asm/fsl_guts.h>
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/* define indexes for each operation mapping scenario */
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#define OMI_QMAN 0x00
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@@ -44,13 +35,13 @@
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#define make64(high, low) (((u64)(high) << 32) | (low))
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struct pamu_isr_data {
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- void __iomem *pamu_reg_base; /* Base address of PAMU regs*/
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+ void __iomem *pamu_reg_base; /* Base address of PAMU regs */
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unsigned int count; /* The number of PAMUs */
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};
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static struct paace *ppaact;
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static struct paace *spaact;
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-static struct ome *omt;
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+static struct ome *omt __initdata;
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/*
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* Table for matching compatible strings, for device tree
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@@ -58,14 +49,13 @@ static struct ome *omt;
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* "fsl,qoriq-device-config-2.0" corresponds to T4 & B4
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* SOCs. For the older SOCs "fsl,qoriq-device-config-1.0"
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* string would be used.
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-*/
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-static const struct of_device_id guts_device_ids[] = {
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+ */
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+static const struct of_device_id guts_device_ids[] __initconst = {
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{ .compatible = "fsl,qoriq-device-config-1.0", },
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{ .compatible = "fsl,qoriq-device-config-2.0", },
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{}
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};
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-
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/*
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* Table for matching compatible strings, for device tree
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* L3 cache controller node.
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@@ -73,7 +63,7 @@ static const struct of_device_id guts_device_ids[] = {
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* "fsl,b4860-l3-cache-controller" corresponds to B4 &
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* "fsl,p4080-l3-cache-controller" corresponds to other,
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* SOCs.
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-*/
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+ */
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static const struct of_device_id l3_device_ids[] = {
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{ .compatible = "fsl,t4240-l3-cache-controller", },
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{ .compatible = "fsl,b4860-l3-cache-controller", },
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@@ -85,7 +75,7 @@ static const struct of_device_id l3_device_ids[] = {
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static u32 max_subwindow_count;
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/* Pool for fspi allocation */
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-struct gen_pool *spaace_pool;
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+static struct gen_pool *spaace_pool;
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/**
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* pamu_get_max_subwin_cnt() - Return the maximum supported
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@@ -170,7 +160,7 @@ int pamu_disable_liodn(int liodn)
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static unsigned int map_addrspace_size_to_wse(phys_addr_t addrspace_size)
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{
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/* Bug if not a power of 2 */
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- BUG_ON((addrspace_size & (addrspace_size - 1)));
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+ BUG_ON(addrspace_size & (addrspace_size - 1));
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/* window size is 2^(WSE+1) bytes */
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return fls64(addrspace_size) - 2;
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@@ -179,8 +169,8 @@ static unsigned int map_addrspace_size_to_wse(phys_addr_t addrspace_size)
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/* Derive the PAACE window count encoding for the subwindow count */
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static unsigned int map_subwindow_cnt_to_wce(u32 subwindow_cnt)
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{
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- /* window count is 2^(WCE+1) bytes */
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- return __ffs(subwindow_cnt) - 1;
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+ /* window count is 2^(WCE+1) bytes */
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+ return __ffs(subwindow_cnt) - 1;
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}
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/*
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@@ -241,7 +231,7 @@ static struct paace *pamu_get_spaace(struct paace *paace, u32 wnum)
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* If no SPAACE entry is available or the allocator can not reserve the required
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* number of contiguous entries function returns ULONG_MAX indicating a failure.
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*
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-*/
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+ */
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static unsigned long pamu_get_fspi_and_allocate(u32 subwin_cnt)
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{
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unsigned long spaace_addr;
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@@ -288,9 +278,8 @@ int pamu_update_paace_stash(int liodn, u32 subwin, u32 value)
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}
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if (subwin) {
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paace = pamu_get_spaace(paace, subwin - 1);
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- if (!paace) {
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+ if (!paace)
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return -ENOENT;
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- }
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}
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set_bf(paace->impl_attr, PAACE_IA_CID, value);
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@@ -311,14 +300,12 @@ int pamu_disable_spaace(int liodn, u32 subwin)
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}
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if (subwin) {
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paace = pamu_get_spaace(paace, subwin - 1);
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- if (!paace) {
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+ if (!paace)
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return -ENOENT;
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- }
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- set_bf(paace->addr_bitfields, PAACE_AF_V,
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- PAACE_V_INVALID);
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+ set_bf(paace->addr_bitfields, PAACE_AF_V, PAACE_V_INVALID);
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} else {
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set_bf(paace->addr_bitfields, PAACE_AF_AP,
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- PAACE_AP_PERMS_DENIED);
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+ PAACE_AP_PERMS_DENIED);
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}
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mb();
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@@ -326,7 +313,6 @@ int pamu_disable_spaace(int liodn, u32 subwin)
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return 0;
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}
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-
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/**
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* pamu_config_paace() - Sets up PPAACE entry for specified liodn
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*
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@@ -352,7 +338,8 @@ int pamu_config_ppaace(int liodn, phys_addr_t win_addr, phys_addr_t win_size,
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unsigned long fspi;
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if ((win_size & (win_size - 1)) || win_size < PAMU_PAGE_SIZE) {
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- pr_debug("window size too small or not a power of two %pa\n", &win_size);
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+ pr_debug("window size too small or not a power of two %pa\n",
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+ &win_size);
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return -EINVAL;
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}
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@@ -362,13 +349,12 @@ int pamu_config_ppaace(int liodn, phys_addr_t win_addr, phys_addr_t win_size,
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}
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ppaace = pamu_get_ppaace(liodn);
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- if (!ppaace) {
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+ if (!ppaace)
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return -ENOENT;
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- }
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/* window size is 2^(WSE+1) bytes */
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set_bf(ppaace->addr_bitfields, PPAACE_AF_WSE,
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- map_addrspace_size_to_wse(win_size));
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+ map_addrspace_size_to_wse(win_size));
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pamu_init_ppaace(ppaace);
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@@ -442,7 +428,6 @@ int pamu_config_spaace(int liodn, u32 subwin_cnt, u32 subwin,
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{
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struct paace *paace;
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-
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/* setup sub-windows */
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if (!subwin_cnt) {
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pr_debug("Invalid subwindow count\n");
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@@ -510,11 +495,11 @@ int pamu_config_spaace(int liodn, u32 subwin_cnt, u32 subwin,
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}
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/**
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-* get_ome_index() - Returns the index in the operation mapping table
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-* for device.
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-* @*omi_index: pointer for storing the index value
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-*
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-*/
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+ * get_ome_index() - Returns the index in the operation mapping table
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+ * for device.
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+ * @*omi_index: pointer for storing the index value
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+ *
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+ */
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void get_ome_index(u32 *omi_index, struct device *dev)
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{
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if (of_device_is_compatible(dev->of_node, "fsl,qman-portal"))
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@@ -544,9 +529,10 @@ u32 get_stash_id(u32 stash_dest_hint, u32 vcpu)
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if (stash_dest_hint == PAMU_ATTR_CACHE_L3) {
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node = of_find_matching_node(NULL, l3_device_ids);
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if (node) {
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- prop = of_get_property(node, "cache-stash-id", 0);
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+ prop = of_get_property(node, "cache-stash-id", NULL);
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if (!prop) {
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- pr_debug("missing cache-stash-id at %s\n", node->full_name);
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+ pr_debug("missing cache-stash-id at %s\n",
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+ node->full_name);
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of_node_put(node);
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return ~(u32)0;
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}
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@@ -570,9 +556,10 @@ found_cpu_node:
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/* find the hwnode that represents the cache */
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for (cache_level = PAMU_ATTR_CACHE_L1; (cache_level < PAMU_ATTR_CACHE_L3) && found; cache_level++) {
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if (stash_dest_hint == cache_level) {
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- prop = of_get_property(node, "cache-stash-id", 0);
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+ prop = of_get_property(node, "cache-stash-id", NULL);
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if (!prop) {
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- pr_debug("missing cache-stash-id at %s\n", node->full_name);
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+ pr_debug("missing cache-stash-id at %s\n",
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+ node->full_name);
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of_node_put(node);
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return ~(u32)0;
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}
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@@ -580,10 +567,10 @@ found_cpu_node:
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return be32_to_cpup(prop);
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}
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- prop = of_get_property(node, "next-level-cache", 0);
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+ prop = of_get_property(node, "next-level-cache", NULL);
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if (!prop) {
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pr_debug("can't find next-level-cache at %s\n",
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- node->full_name);
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+ node->full_name);
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of_node_put(node);
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return ~(u32)0; /* can't traverse any further */
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}
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@@ -598,7 +585,7 @@ found_cpu_node:
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}
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pr_debug("stash dest not found for %d on vcpu %d\n",
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- stash_dest_hint, vcpu);
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+ stash_dest_hint, vcpu);
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return ~(u32)0;
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}
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@@ -612,7 +599,7 @@ found_cpu_node:
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* Memory accesses to QMAN and BMAN private memory need not be coherent, so
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* clear the PAACE entry coherency attribute for them.
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*/
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-static void setup_qbman_paace(struct paace *ppaace, int paace_type)
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+static void __init setup_qbman_paace(struct paace *ppaace, int paace_type)
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{
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switch (paace_type) {
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case QMAN_PAACE:
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@@ -626,7 +613,7 @@ static void setup_qbman_paace(struct paace *ppaace, int paace_type)
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case QMAN_PORTAL_PAACE:
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set_bf(ppaace->impl_attr, PAACE_IA_OTM, PAACE_OTM_INDEXED);
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ppaace->op_encode.index_ot.omi = OMI_QMAN;
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- /*Set DQRR and Frame stashing for the L3 cache */
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+ /* Set DQRR and Frame stashing for the L3 cache */
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set_bf(ppaace->impl_attr, PAACE_IA_CID, get_stash_id(PAMU_ATTR_CACHE_L3, 0));
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break;
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case BMAN_PAACE:
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@@ -679,7 +666,7 @@ static void __init setup_omt(struct ome *omt)
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* Get the maximum number of PAACT table entries
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* and subwindows supported by PAMU
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*/
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-static void get_pamu_cap_values(unsigned long pamu_reg_base)
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+static void __init get_pamu_cap_values(unsigned long pamu_reg_base)
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{
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u32 pc_val;
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@@ -689,9 +676,9 @@ static void get_pamu_cap_values(unsigned long pamu_reg_base)
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}
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/* Setup PAMU registers pointing to PAACT, SPAACT and OMT */
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-int setup_one_pamu(unsigned long pamu_reg_base, unsigned long pamu_reg_size,
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- phys_addr_t ppaact_phys, phys_addr_t spaact_phys,
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- phys_addr_t omt_phys)
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+static int __init setup_one_pamu(unsigned long pamu_reg_base, unsigned long pamu_reg_size,
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+ phys_addr_t ppaact_phys, phys_addr_t spaact_phys,
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+ phys_addr_t omt_phys)
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{
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u32 *pc;
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struct pamu_mmap_regs *pamu_regs;
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@@ -727,7 +714,7 @@ int setup_one_pamu(unsigned long pamu_reg_base, unsigned long pamu_reg_size,
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*/
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out_be32((u32 *)(pamu_reg_base + PAMU_PICS),
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- PAMU_ACCESS_VIOLATION_ENABLE);
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+ PAMU_ACCESS_VIOLATION_ENABLE);
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out_be32(pc, PAMU_PC_PE | PAMU_PC_OCE | PAMU_PC_SPCC | PAMU_PC_PPCC);
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return 0;
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}
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@@ -757,9 +744,9 @@ static void __init setup_liodns(void)
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ppaace->wbah = 0;
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set_bf(ppaace->addr_bitfields, PPAACE_AF_WBAL, 0);
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set_bf(ppaace->impl_attr, PAACE_IA_ATM,
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- PAACE_ATM_NO_XLATE);
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+ PAACE_ATM_NO_XLATE);
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set_bf(ppaace->addr_bitfields, PAACE_AF_AP,
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- PAACE_AP_PERMS_ALL);
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+ PAACE_AP_PERMS_ALL);
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if (of_device_is_compatible(node, "fsl,qman-portal"))
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setup_qbman_paace(ppaace, QMAN_PORTAL_PAACE);
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if (of_device_is_compatible(node, "fsl,qman"))
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@@ -772,7 +759,7 @@ static void __init setup_liodns(void)
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}
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}
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-irqreturn_t pamu_av_isr(int irq, void *arg)
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+static irqreturn_t pamu_av_isr(int irq, void *arg)
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{
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struct pamu_isr_data *data = arg;
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phys_addr_t phys;
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@@ -792,14 +779,16 @@ irqreturn_t pamu_av_isr(int irq, void *arg)
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pr_emerg("POES2=%08x\n", in_be32(p + PAMU_POES2));
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pr_emerg("AVS1=%08x\n", avs1);
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pr_emerg("AVS2=%08x\n", in_be32(p + PAMU_AVS2));
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- pr_emerg("AVA=%016llx\n", make64(in_be32(p + PAMU_AVAH),
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- in_be32(p + PAMU_AVAL)));
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+ pr_emerg("AVA=%016llx\n",
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+ make64(in_be32(p + PAMU_AVAH),
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+ in_be32(p + PAMU_AVAL)));
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pr_emerg("UDAD=%08x\n", in_be32(p + PAMU_UDAD));
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- pr_emerg("POEA=%016llx\n", make64(in_be32(p + PAMU_POEAH),
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- in_be32(p + PAMU_POEAL)));
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+ pr_emerg("POEA=%016llx\n",
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+ make64(in_be32(p + PAMU_POEAH),
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+ in_be32(p + PAMU_POEAL)));
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phys = make64(in_be32(p + PAMU_POEAH),
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- in_be32(p + PAMU_POEAL));
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+ in_be32(p + PAMU_POEAL));
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/* Assume that POEA points to a PAACE */
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if (phys) {
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@@ -807,11 +796,12 @@ irqreturn_t pamu_av_isr(int irq, void *arg)
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/* Only the first four words are relevant */
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for (j = 0; j < 4; j++)
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- pr_emerg("PAACE[%u]=%08x\n", j, in_be32(paace + j));
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+ pr_emerg("PAACE[%u]=%08x\n",
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+ j, in_be32(paace + j));
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}
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/* clear access violation condition */
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- out_be32((p + PAMU_AVS1), avs1 & PAMU_AV_MASK);
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+ out_be32(p + PAMU_AVS1, avs1 & PAMU_AV_MASK);
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paace = pamu_get_ppaace(avs1 >> PAMU_AVS1_LIODN_SHIFT);
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BUG_ON(!paace);
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/* check if we got a violation for a disabled LIODN */
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@@ -827,13 +817,13 @@ irqreturn_t pamu_av_isr(int irq, void *arg)
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/* Disable the LIODN */
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ret = pamu_disable_liodn(avs1 >> PAMU_AVS1_LIODN_SHIFT);
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BUG_ON(ret);
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- pr_emerg("Disabling liodn %x\n", avs1 >> PAMU_AVS1_LIODN_SHIFT);
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+ pr_emerg("Disabling liodn %x\n",
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+ avs1 >> PAMU_AVS1_LIODN_SHIFT);
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}
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out_be32((p + PAMU_PICS), pics);
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}
|
|
|
}
|
|
|
|
|
|
-
|
|
|
return IRQ_HANDLED;
|
|
|
}
|
|
|
|
|
@@ -952,7 +942,7 @@ static int __init create_csd(phys_addr_t phys, size_t size, u32 csd_port_id)
|
|
|
}
|
|
|
|
|
|
if (i == 0 || i == num_laws) {
|
|
|
- /* This should never happen*/
|
|
|
+ /* This should never happen */
|
|
|
ret = -ENOENT;
|
|
|
goto error;
|
|
|
}
|
|
@@ -998,26 +988,27 @@ error:
|
|
|
static const struct {
|
|
|
u32 svr;
|
|
|
u32 port_id;
|
|
|
-} port_id_map[] = {
|
|
|
- {0x82100010, 0xFF000000}, /* P2040 1.0 */
|
|
|
- {0x82100011, 0xFF000000}, /* P2040 1.1 */
|
|
|
- {0x82100110, 0xFF000000}, /* P2041 1.0 */
|
|
|
- {0x82100111, 0xFF000000}, /* P2041 1.1 */
|
|
|
- {0x82110310, 0xFF000000}, /* P3041 1.0 */
|
|
|
- {0x82110311, 0xFF000000}, /* P3041 1.1 */
|
|
|
- {0x82010020, 0xFFF80000}, /* P4040 2.0 */
|
|
|
- {0x82000020, 0xFFF80000}, /* P4080 2.0 */
|
|
|
- {0x82210010, 0xFC000000}, /* P5010 1.0 */
|
|
|
- {0x82210020, 0xFC000000}, /* P5010 2.0 */
|
|
|
- {0x82200010, 0xFC000000}, /* P5020 1.0 */
|
|
|
- {0x82050010, 0xFF800000}, /* P5021 1.0 */
|
|
|
- {0x82040010, 0xFF800000}, /* P5040 1.0 */
|
|
|
+} port_id_map[] __initconst = {
|
|
|
+ {(SVR_P2040 << 8) | 0x10, 0xFF000000}, /* P2040 1.0 */
|
|
|
+ {(SVR_P2040 << 8) | 0x11, 0xFF000000}, /* P2040 1.1 */
|
|
|
+ {(SVR_P2041 << 8) | 0x10, 0xFF000000}, /* P2041 1.0 */
|
|
|
+ {(SVR_P2041 << 8) | 0x11, 0xFF000000}, /* P2041 1.1 */
|
|
|
+ {(SVR_P3041 << 8) | 0x10, 0xFF000000}, /* P3041 1.0 */
|
|
|
+ {(SVR_P3041 << 8) | 0x11, 0xFF000000}, /* P3041 1.1 */
|
|
|
+ {(SVR_P4040 << 8) | 0x20, 0xFFF80000}, /* P4040 2.0 */
|
|
|
+ {(SVR_P4080 << 8) | 0x20, 0xFFF80000}, /* P4080 2.0 */
|
|
|
+ {(SVR_P5010 << 8) | 0x10, 0xFC000000}, /* P5010 1.0 */
|
|
|
+ {(SVR_P5010 << 8) | 0x20, 0xFC000000}, /* P5010 2.0 */
|
|
|
+ {(SVR_P5020 << 8) | 0x10, 0xFC000000}, /* P5020 1.0 */
|
|
|
+ {(SVR_P5021 << 8) | 0x10, 0xFF800000}, /* P5021 1.0 */
|
|
|
+ {(SVR_P5040 << 8) | 0x10, 0xFF800000}, /* P5040 1.0 */
|
|
|
};
|
|
|
|
|
|
#define SVR_SECURITY 0x80000 /* The Security (E) bit */
|
|
|
|
|
|
static int __init fsl_pamu_probe(struct platform_device *pdev)
|
|
|
{
|
|
|
+ struct device *dev = &pdev->dev;
|
|
|
void __iomem *pamu_regs = NULL;
|
|
|
struct ccsr_guts __iomem *guts_regs = NULL;
|
|
|
u32 pamubypenr, pamu_counter;
|
|
@@ -1042,22 +1033,21 @@ static int __init fsl_pamu_probe(struct platform_device *pdev)
|
|
|
* NOTE : All PAMUs share the same LIODN tables.
|
|
|
*/
|
|
|
|
|
|
- pamu_regs = of_iomap(pdev->dev.of_node, 0);
|
|
|
+ pamu_regs = of_iomap(dev->of_node, 0);
|
|
|
if (!pamu_regs) {
|
|
|
- dev_err(&pdev->dev, "ioremap of PAMU node failed\n");
|
|
|
+ dev_err(dev, "ioremap of PAMU node failed\n");
|
|
|
return -ENOMEM;
|
|
|
}
|
|
|
- of_get_address(pdev->dev.of_node, 0, &size, NULL);
|
|
|
+ of_get_address(dev->of_node, 0, &size, NULL);
|
|
|
|
|
|
- irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
|
|
|
+ irq = irq_of_parse_and_map(dev->of_node, 0);
|
|
|
if (irq == NO_IRQ) {
|
|
|
- dev_warn(&pdev->dev, "no interrupts listed in PAMU node\n");
|
|
|
+ dev_warn(dev, "no interrupts listed in PAMU node\n");
|
|
|
goto error;
|
|
|
}
|
|
|
|
|
|
- data = kzalloc(sizeof(struct pamu_isr_data), GFP_KERNEL);
|
|
|
+ data = kzalloc(sizeof(*data), GFP_KERNEL);
|
|
|
if (!data) {
|
|
|
- dev_err(&pdev->dev, "PAMU isr data memory allocation failed\n");
|
|
|
ret = -ENOMEM;
|
|
|
goto error;
|
|
|
}
|
|
@@ -1067,15 +1057,14 @@ static int __init fsl_pamu_probe(struct platform_device *pdev)
|
|
|
/* The ISR needs access to the regs, so we won't iounmap them */
|
|
|
ret = request_irq(irq, pamu_av_isr, 0, "pamu", data);
|
|
|
if (ret < 0) {
|
|
|
- dev_err(&pdev->dev, "error %i installing ISR for irq %i\n",
|
|
|
- ret, irq);
|
|
|
+ dev_err(dev, "error %i installing ISR for irq %i\n", ret, irq);
|
|
|
goto error;
|
|
|
}
|
|
|
|
|
|
guts_node = of_find_matching_node(NULL, guts_device_ids);
|
|
|
if (!guts_node) {
|
|
|
- dev_err(&pdev->dev, "could not find GUTS node %s\n",
|
|
|
- pdev->dev.of_node->full_name);
|
|
|
+ dev_err(dev, "could not find GUTS node %s\n",
|
|
|
+ dev->of_node->full_name);
|
|
|
ret = -ENODEV;
|
|
|
goto error;
|
|
|
}
|
|
@@ -1083,7 +1072,7 @@ static int __init fsl_pamu_probe(struct platform_device *pdev)
|
|
|
guts_regs = of_iomap(guts_node, 0);
|
|
|
of_node_put(guts_node);
|
|
|
if (!guts_regs) {
|
|
|
- dev_err(&pdev->dev, "ioremap of GUTS node failed\n");
|
|
|
+ dev_err(dev, "ioremap of GUTS node failed\n");
|
|
|
ret = -ENODEV;
|
|
|
goto error;
|
|
|
}
|
|
@@ -1103,7 +1092,7 @@ static int __init fsl_pamu_probe(struct platform_device *pdev)
|
|
|
|
|
|
p = alloc_pages(GFP_KERNEL | __GFP_ZERO, order);
|
|
|
if (!p) {
|
|
|
- dev_err(&pdev->dev, "unable to allocate PAACT/SPAACT/OMT block\n");
|
|
|
+ dev_err(dev, "unable to allocate PAACT/SPAACT/OMT block\n");
|
|
|
ret = -ENOMEM;
|
|
|
goto error;
|
|
|
}
|
|
@@ -1113,7 +1102,7 @@ static int __init fsl_pamu_probe(struct platform_device *pdev)
|
|
|
|
|
|
/* Make sure the memory is naturally aligned */
|
|
|
if (ppaact_phys & ((PAGE_SIZE << order) - 1)) {
|
|
|
- dev_err(&pdev->dev, "PAACT/OMT block is unaligned\n");
|
|
|
+ dev_err(dev, "PAACT/OMT block is unaligned\n");
|
|
|
ret = -ENOMEM;
|
|
|
goto error;
|
|
|
}
|
|
@@ -1121,7 +1110,7 @@ static int __init fsl_pamu_probe(struct platform_device *pdev)
|
|
|
spaact = (void *)ppaact + (PAGE_SIZE << get_order(PAACT_SIZE));
|
|
|
omt = (void *)spaact + (PAGE_SIZE << get_order(SPAACT_SIZE));
|
|
|
|
|
|
- dev_dbg(&pdev->dev, "ppaact virt=%p phys=%pa\n", ppaact, &ppaact_phys);
|
|
|
+ dev_dbg(dev, "ppaact virt=%p phys=%pa\n", ppaact, &ppaact_phys);
|
|
|
|
|
|
/* Check to see if we need to implement the work-around on this SOC */
|
|
|
|
|
@@ -1129,21 +1118,19 @@ static int __init fsl_pamu_probe(struct platform_device *pdev)
|
|
|
for (i = 0; i < ARRAY_SIZE(port_id_map); i++) {
|
|
|
if (port_id_map[i].svr == (mfspr(SPRN_SVR) & ~SVR_SECURITY)) {
|
|
|
csd_port_id = port_id_map[i].port_id;
|
|
|
- dev_dbg(&pdev->dev, "found matching SVR %08x\n",
|
|
|
+ dev_dbg(dev, "found matching SVR %08x\n",
|
|
|
port_id_map[i].svr);
|
|
|
break;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
if (csd_port_id) {
|
|
|
- dev_dbg(&pdev->dev, "creating coherency subdomain at address "
|
|
|
- "%pa, size %zu, port id 0x%08x", &ppaact_phys,
|
|
|
- mem_size, csd_port_id);
|
|
|
+ dev_dbg(dev, "creating coherency subdomain at address %pa, size %zu, port id 0x%08x",
|
|
|
+ &ppaact_phys, mem_size, csd_port_id);
|
|
|
|
|
|
ret = create_csd(ppaact_phys, mem_size, csd_port_id);
|
|
|
if (ret) {
|
|
|
- dev_err(&pdev->dev, "could not create coherence "
|
|
|
- "subdomain\n");
|
|
|
+ dev_err(dev, "could not create coherence subdomain\n");
|
|
|
return ret;
|
|
|
}
|
|
|
}
|
|
@@ -1154,7 +1141,7 @@ static int __init fsl_pamu_probe(struct platform_device *pdev)
|
|
|
spaace_pool = gen_pool_create(ilog2(sizeof(struct paace)), -1);
|
|
|
if (!spaace_pool) {
|
|
|
ret = -ENOMEM;
|
|
|
- dev_err(&pdev->dev, "PAMU : failed to allocate spaace gen pool\n");
|
|
|
+ dev_err(dev, "Failed to allocate spaace gen pool\n");
|
|
|
goto error;
|
|
|
}
|
|
|
|
|
@@ -1167,9 +1154,9 @@ static int __init fsl_pamu_probe(struct platform_device *pdev)
|
|
|
for (pamu_reg_off = 0, pamu_counter = 0x80000000; pamu_reg_off < size;
|
|
|
pamu_reg_off += PAMU_OFFSET, pamu_counter >>= 1) {
|
|
|
|
|
|
- pamu_reg_base = (unsigned long) pamu_regs + pamu_reg_off;
|
|
|
+ pamu_reg_base = (unsigned long)pamu_regs + pamu_reg_off;
|
|
|
setup_one_pamu(pamu_reg_base, pamu_reg_off, ppaact_phys,
|
|
|
- spaact_phys, omt_phys);
|
|
|
+ spaact_phys, omt_phys);
|
|
|
/* Disable PAMU bypass for this PAMU */
|
|
|
pamubypenr &= ~pamu_counter;
|
|
|
}
|
|
@@ -1181,7 +1168,7 @@ static int __init fsl_pamu_probe(struct platform_device *pdev)
|
|
|
|
|
|
iounmap(guts_regs);
|
|
|
|
|
|
- /* Enable DMA for the LIODNs in the device tree*/
|
|
|
+ /* Enable DMA for the LIODNs in the device tree */
|
|
|
|
|
|
setup_liodns();
|
|
|
|