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@@ -21,11 +21,10 @@
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#include <linux/slab.h>
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#define FTM_SC 0x00
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-#define FTM_SC_CLK_MASK 0x3
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-#define FTM_SC_CLK_SHIFT 3
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-#define FTM_SC_CLK(c) (((c) + 1) << FTM_SC_CLK_SHIFT)
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+#define FTM_SC_CLK_MASK_SHIFT 3
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+#define FTM_SC_CLK_MASK (3 << FTM_SC_CLK_MASK_SHIFT)
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+#define FTM_SC_CLK(c) (((c) + 1) << FTM_SC_CLK_MASK_SHIFT)
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#define FTM_SC_PS_MASK 0x7
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-#define FTM_SC_PS_SHIFT 0
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#define FTM_CNT 0x04
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#define FTM_MOD 0x08
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@@ -258,7 +257,7 @@ static int fsl_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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}
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val = readl(fpc->base + FTM_SC);
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- val &= ~(FTM_SC_PS_MASK << FTM_SC_PS_SHIFT);
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+ val &= ~FTM_SC_PS_MASK;
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val |= fpc->clk_ps;
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writel(val, fpc->base + FTM_SC);
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writel(period - 1, fpc->base + FTM_MOD);
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@@ -305,7 +304,7 @@ static int fsl_counter_clock_enable(struct fsl_pwm_chip *fpc)
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/* select counter clock source */
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val = readl(fpc->base + FTM_SC);
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- val &= ~(FTM_SC_CLK_MASK << FTM_SC_CLK_SHIFT);
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+ val &= ~FTM_SC_CLK_MASK;
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val |= FTM_SC_CLK(fpc->cnt_select);
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writel(val, fpc->base + FTM_SC);
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@@ -357,7 +356,7 @@ static void fsl_counter_clock_disable(struct fsl_pwm_chip *fpc)
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/* no users left, disable PWM counter clock */
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val = readl(fpc->base + FTM_SC);
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- val &= ~(FTM_SC_CLK_MASK << FTM_SC_CLK_SHIFT);
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+ val &= ~FTM_SC_CLK_MASK;
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writel(val, fpc->base + FTM_SC);
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clk_disable_unprepare(fpc->clk[FSL_PWM_CLK_CNTEN]);
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