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@@ -352,11 +352,11 @@ void vnt_set_antenna_mode(struct vnt_private *priv, u8 antenna_mode)
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case ANT_TXB:
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break;
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case ANT_RXA:
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- priv->byBBRxConf &= 0xFC;
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+ priv->bb_rx_conf &= 0xFC;
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break;
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case ANT_RXB:
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- priv->byBBRxConf &= 0xFE;
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- priv->byBBRxConf |= 0x02;
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+ priv->bb_rx_conf &= 0xFE;
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+ priv->bb_rx_conf |= 0x02;
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break;
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}
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@@ -404,7 +404,7 @@ int vnt_vt3184_init(struct vnt_private *priv)
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if ((priv->rf_type == RF_AL2230) ||
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(priv->rf_type == RF_AL2230S)) {
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- priv->byBBRxConf = vnt_vt3184_al2230[10];
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+ priv->bb_rx_conf = vnt_vt3184_al2230[10];
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length = sizeof(vnt_vt3184_al2230);
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addr = vnt_vt3184_al2230;
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agc = vnt_vt3184_agc;
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@@ -419,7 +419,7 @@ int vnt_vt3184_init(struct vnt_private *priv)
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priv->ldBmThreshold[2] = 0;
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priv->ldBmThreshold[3] = 0;
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} else if (priv->rf_type == RF_AIROHA7230) {
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- priv->byBBRxConf = vnt_vt3184_al2230[10];
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+ priv->bb_rx_conf = vnt_vt3184_al2230[10];
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length = sizeof(vnt_vt3184_al2230);
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addr = vnt_vt3184_al2230;
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agc = vnt_vt3184_agc;
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@@ -437,7 +437,7 @@ int vnt_vt3184_init(struct vnt_private *priv)
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priv->ldBmThreshold[3] = 0;
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} else if ((priv->rf_type == RF_VT3226) ||
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(priv->rf_type == RF_VT3226D0)) {
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- priv->byBBRxConf = vnt_vt3184_vt3226d0[10];
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+ priv->bb_rx_conf = vnt_vt3184_vt3226d0[10];
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length = sizeof(vnt_vt3184_vt3226d0);
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addr = vnt_vt3184_vt3226d0;
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agc = vnt_vt3184_agc;
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@@ -455,7 +455,7 @@ int vnt_vt3184_init(struct vnt_private *priv)
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vnt_mac_reg_bits_on(priv, MAC_REG_SOFTPWRCTL2,
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SOFTPWRCTL_RFLEOPT);
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} else if (priv->rf_type == RF_VT3342A0) {
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- priv->byBBRxConf = vnt_vt3184_vt3226d0[10];
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+ priv->bb_rx_conf = vnt_vt3184_vt3226d0[10];
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length = sizeof(vnt_vt3184_vt3226d0);
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addr = vnt_vt3184_vt3226d0;
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agc = vnt_vt3184_agc;
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@@ -531,16 +531,16 @@ void vnt_set_short_slot_time(struct vnt_private *priv)
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u8 bb_vga = 0;
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if (priv->bShortSlotTime)
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- priv->byBBRxConf &= 0xdf;
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+ priv->bb_rx_conf &= 0xdf;
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else
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- priv->byBBRxConf |= 0x20;
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+ priv->bb_rx_conf |= 0x20;
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vnt_control_in_u8(priv, MESSAGE_REQUEST_BBREG, 0xe7, &bb_vga);
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if (bb_vga == priv->abyBBVGA[0])
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- priv->byBBRxConf |= 0x20;
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+ priv->bb_rx_conf |= 0x20;
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- vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
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+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->bb_rx_conf);
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}
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void vnt_set_vga_gain_offset(struct vnt_private *priv, u8 data)
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@@ -550,11 +550,11 @@ void vnt_set_vga_gain_offset(struct vnt_private *priv, u8 data)
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/* patch for 3253B0 Baseband with Cardbus module */
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if (priv->bShortSlotTime)
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- priv->byBBRxConf &= 0xdf; /* 1101 1111 */
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+ priv->bb_rx_conf &= 0xdf; /* 1101 1111 */
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else
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- priv->byBBRxConf |= 0x20; /* 0010 0000 */
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+ priv->bb_rx_conf |= 0x20; /* 0010 0000 */
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- vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
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+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->bb_rx_conf);
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}
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/*
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