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@@ -58,6 +58,18 @@ Required properties:
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integer cells. The first cell is the offset of SYSCTRL register used
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integer cells. The first cell is the offset of SYSCTRL register used
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to control TV Encoder DAC power, and the second cell is the bit mask.
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to control TV Encoder DAC power, and the second cell is the bit mask.
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+* VGA output device
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+
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+Required properties:
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+ - compatible: should be "zte,zx296718-vga"
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+ - reg: Physical base address and length of the VGA device IO region
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+ - interrupts : VGA interrupt number to CPU
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+ - clocks: Phandle with clock-specifier pointing to VGA I2C clock.
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+ - clock-names: Must be "i2c_wclk".
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+ - zte,vga-power-control: the phandle to SYSCTRL block followed by two
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+ integer cells. The first cell is the offset of SYSCTRL register used
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+ to control VGA DAC power, and the second cell is the bit mask.
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+
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Example:
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Example:
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vou: vou@1440000 {
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vou: vou@1440000 {
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@@ -81,6 +93,15 @@ vou: vou@1440000 {
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"main_wclk", "aux_wclk";
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"main_wclk", "aux_wclk";
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};
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};
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+ vga: vga@8000 {
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+ compatible = "zte,zx296718-vga";
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+ reg = <0x8000 0x1000>;
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+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&topcrm VGA_I2C_WCLK>;
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+ clock-names = "i2c_wclk";
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+ zte,vga-power-control = <&sysctrl 0x170 0xe0>;
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+ };
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+
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hdmi: hdmi@c000 {
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hdmi: hdmi@c000 {
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compatible = "zte,zx296718-hdmi";
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compatible = "zte,zx296718-hdmi";
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reg = <0xc000 0x4000>;
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reg = <0xc000 0x4000>;
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