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@@ -157,14 +157,9 @@ intel_dp_max_link_bw(struct intel_dp *intel_dp)
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static u8 intel_dp_max_lane_count(struct intel_dp *intel_dp)
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{
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struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
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- struct drm_device *dev = intel_dig_port->base.base.dev;
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u8 source_max, sink_max;
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- source_max = 4;
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- if (HAS_DDI(dev) && intel_dig_port->port == PORT_A &&
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- (intel_dig_port->saved_port_bits & DDI_A_4_LANES) == 0)
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- source_max = 2;
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-
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+ source_max = intel_dig_port->max_lanes;
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sink_max = drm_dp_max_lane_count(intel_dp->dpcd);
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return min(source_max, sink_max);
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@@ -5839,6 +5834,11 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
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enum port port = intel_dig_port->port;
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int type, ret;
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+ if (WARN(intel_dig_port->max_lanes < 1,
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+ "Not enough lanes (%d) for DP on port %c\n",
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+ intel_dig_port->max_lanes, port_name(port)))
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+ return false;
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+
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intel_dp->pps_pipe = INVALID_PIPE;
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/* intel_dp vfuncs */
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@@ -6037,6 +6037,7 @@ intel_dp_init(struct drm_device *dev,
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intel_dig_port->port = port;
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dev_priv->dig_port_map[port] = intel_encoder;
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intel_dig_port->dp.output_reg = output_reg;
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+ intel_dig_port->max_lanes = 4;
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intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT;
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if (IS_CHERRYVIEW(dev)) {
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