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@@ -549,10 +549,15 @@ static int cppi41_dma_channel_abort(struct dma_channel *channel)
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csr &= ~MUSB_TXCSR_DMAENAB;
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musb_writew(epio, MUSB_TXCSR, csr);
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} else {
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+ cppi41_set_autoreq_mode(cppi41_channel, EP_MODE_AUTOREQ_NONE);
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+
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csr = musb_readw(epio, MUSB_RXCSR);
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csr &= ~(MUSB_RXCSR_H_REQPKT | MUSB_RXCSR_DMAENAB);
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musb_writew(epio, MUSB_RXCSR, csr);
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+ /* wait to drain cppi dma pipe line */
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+ udelay(50);
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+
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csr = musb_readw(epio, MUSB_RXCSR);
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if (csr & MUSB_RXCSR_RXPKTRDY) {
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csr |= MUSB_RXCSR_FLUSHFIFO;
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@@ -566,13 +571,14 @@ static int cppi41_dma_channel_abort(struct dma_channel *channel)
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tdbit <<= 16;
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do {
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- musb_writel(musb->ctrl_base, USB_TDOWN, tdbit);
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+ if (is_tx)
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+ musb_writel(musb->ctrl_base, USB_TDOWN, tdbit);
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ret = dmaengine_terminate_all(cppi41_channel->dc);
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} while (ret == -EAGAIN);
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- musb_writel(musb->ctrl_base, USB_TDOWN, tdbit);
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-
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if (is_tx) {
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+ musb_writel(musb->ctrl_base, USB_TDOWN, tdbit);
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+
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csr = musb_readw(epio, MUSB_TXCSR);
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if (csr & MUSB_TXCSR_TXPKTRDY) {
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csr |= MUSB_TXCSR_FLUSHFIFO;
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