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@@ -31,6 +31,7 @@
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* registers for winkle support.
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*/
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#define _SDR1 GPR3
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+#define _PTCR GPR3
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#define _RPR GPR4
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#define _SPURR GPR5
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#define _PURR GPR6
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@@ -39,7 +40,7 @@
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#define _AMOR GPR9
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#define _WORT GPR10
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#define _WORC GPR11
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-#define _PTCR GPR12
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+#define _LPCR GPR12
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#define PSSCR_EC_ESL_MASK_SHIFTED (PSSCR_EC | PSSCR_ESL) >> 16
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@@ -55,12 +56,14 @@ save_sprs_to_stack:
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* here since any thread in the core might wake up first
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*/
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BEGIN_FTR_SECTION
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- mfspr r3,SPRN_PTCR
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- std r3,_PTCR(r1)
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/*
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* Note - SDR1 is dropped in Power ISA v3. Hence not restoring
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* SDR1 here
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*/
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+ mfspr r3,SPRN_PTCR
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+ std r3,_PTCR(r1)
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+ mfspr r3,SPRN_LPCR
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+ std r3,_LPCR(r1)
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FTR_SECTION_ELSE
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mfspr r3,SPRN_SDR1
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std r3,_SDR1(r1)
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@@ -813,6 +816,10 @@ no_segments:
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mtctr r12
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bctrl
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+BEGIN_FTR_SECTION
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+ ld r4,_LPCR(r1)
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+ mtspr SPRN_LPCR,r4
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+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
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hypervisor_state_restored:
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mtspr SPRN_SRR1,r16
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