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@@ -48,8 +48,10 @@
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#define INA2XX_MAX_REGISTERS 8
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/* settings - depend on use case */
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-#define INA219_CONFIG_DEFAULT 0x399F /* PGA=8 */
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+#define INA219_CONFIG_DEFAULT 0x399F /* PGA=1/8, BRNG=32V */
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#define INA219_DEFAULT_IT 532
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+#define INA219_DEFAULT_BRNG 1 /* 32V */
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+#define INA219_DEFAULT_PGA 125 /* 1000/8 */
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#define INA226_CONFIG_DEFAULT 0x4327
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#define INA226_DEFAULT_AVG 4
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#define INA226_DEFAULT_IT 1110
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@@ -62,6 +64,14 @@
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*/
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#define INA2XX_MODE_MASK GENMASK(3, 0)
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+/* Gain for VShunt: 1/8 (default), 1/4, 1/2, 1 */
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+#define INA219_PGA_MASK GENMASK(12, 11)
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+#define INA219_SHIFT_PGA(val) ((val) << 11)
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+
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+/* VBus range: 32V (default), 16V */
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+#define INA219_BRNG_MASK BIT(13)
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+#define INA219_SHIFT_BRNG(val) ((val) << 13)
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+
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/* Averaging for VBus/VShunt/Power */
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#define INA226_AVG_MASK GENMASK(11, 9)
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#define INA226_SHIFT_AVG(val) ((val) << 9)
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@@ -131,6 +141,8 @@ struct ina2xx_chip_info {
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int avg;
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int int_time_vbus; /* Bus voltage integration time uS */
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int int_time_vshunt; /* Shunt voltage integration time uS */
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+ int range_vbus; /* Bus voltage maximum in V */
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+ int pga_gain_vshunt; /* Shunt voltage PGA gain */
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bool allow_async_readout;
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};
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@@ -226,6 +238,18 @@ static int ina2xx_read_raw(struct iio_dev *indio_dev,
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*val = 1;
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return IIO_VAL_INT;
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}
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+
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+ case IIO_CHAN_INFO_HARDWAREGAIN:
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+ switch (chan->address) {
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+ case INA2XX_SHUNT_VOLTAGE:
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+ *val = chip->pga_gain_vshunt;
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+ *val2 = 1000;
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+ return IIO_VAL_FRACTIONAL;
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+
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+ case INA2XX_BUS_VOLTAGE:
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+ *val = chip->range_vbus == 32 ? 1 : 2;
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+ return IIO_VAL_INT;
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+ }
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}
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return -EINVAL;
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@@ -360,6 +384,74 @@ static int ina219_set_int_time_vshunt(struct ina2xx_chip_info *chip,
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return 0;
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}
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+static const int ina219_vbus_range_tab[] = { 1, 2 };
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+static int ina219_set_vbus_range_denom(struct ina2xx_chip_info *chip,
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+ unsigned int range,
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+ unsigned int *config)
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+{
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+ if (range == 1)
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+ chip->range_vbus = 32;
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+ else if (range == 2)
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+ chip->range_vbus = 16;
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+ else
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+ return -EINVAL;
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+
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+ *config &= ~INA219_BRNG_MASK;
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+ *config |= INA219_SHIFT_BRNG(range == 1 ? 1 : 0) & INA219_BRNG_MASK;
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+
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+ return 0;
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+}
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+
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+static const int ina219_vshunt_gain_tab[] = { 125, 250, 500, 1000 };
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+static const int ina219_vshunt_gain_frac[] = {
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+ 125, 1000, 250, 1000, 500, 1000, 1000, 1000 };
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+
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+static int ina219_set_vshunt_pga_gain(struct ina2xx_chip_info *chip,
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+ unsigned int gain,
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+ unsigned int *config)
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+{
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+ int bits;
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+
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+ if (gain < 125 || gain > 1000)
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+ return -EINVAL;
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+
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+ bits = find_closest(gain, ina219_vshunt_gain_tab,
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+ ARRAY_SIZE(ina219_vshunt_gain_tab));
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+
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+ chip->pga_gain_vshunt = ina219_vshunt_gain_tab[bits];
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+ bits = 3 - bits;
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+
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+ *config &= ~INA219_PGA_MASK;
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+ *config |= INA219_SHIFT_PGA(bits) & INA219_PGA_MASK;
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+
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+ return 0;
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+}
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+
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+static int ina2xx_read_avail(struct iio_dev *indio_dev,
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+ struct iio_chan_spec const *chan,
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+ const int **vals, int *type, int *length,
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+ long mask)
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+{
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+ switch (mask) {
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+ case IIO_CHAN_INFO_HARDWAREGAIN:
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+ switch (chan->address) {
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+ case INA2XX_SHUNT_VOLTAGE:
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+ *type = IIO_VAL_FRACTIONAL;
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+ *length = sizeof(ina219_vshunt_gain_frac) / sizeof(int);
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+ *vals = ina219_vshunt_gain_frac;
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+ return IIO_AVAIL_LIST;
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+
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+ case INA2XX_BUS_VOLTAGE:
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+ *type = IIO_VAL_INT;
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+ *length = sizeof(ina219_vbus_range_tab) / sizeof(int);
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+ *vals = ina219_vbus_range_tab;
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+ return IIO_AVAIL_LIST;
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+ }
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+ }
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+
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+ return -EINVAL;
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+}
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+
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static int ina2xx_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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@@ -402,6 +494,14 @@ static int ina2xx_write_raw(struct iio_dev *indio_dev,
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}
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break;
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+ case IIO_CHAN_INFO_HARDWAREGAIN:
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+ if (chan->address == INA2XX_SHUNT_VOLTAGE)
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+ ret = ina219_set_vshunt_pga_gain(chip, val * 1000 +
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+ val2 / 1000, &tmp);
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+ else
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+ ret = ina219_set_vbus_range_denom(chip, val, &tmp);
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+ break;
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+
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default:
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ret = -EINVAL;
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}
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@@ -546,7 +646,10 @@ static ssize_t ina2xx_shunt_resistor_store(struct device *dev,
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.channel = (_index), \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_SCALE) | \
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- BIT(IIO_CHAN_INFO_INT_TIME), \
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+ BIT(IIO_CHAN_INFO_INT_TIME) | \
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+ BIT(IIO_CHAN_INFO_HARDWAREGAIN), \
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+ .info_mask_separate_available = \
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+ BIT(IIO_CHAN_INFO_HARDWAREGAIN), \
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.info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
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.scan_index = (_index), \
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.scan_type = { \
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@@ -754,7 +857,6 @@ static IIO_CONST_ATTR_NAMED(ina226_integration_time_available,
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integration_time_available,
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"0.000140 0.000204 0.000332 0.000588 0.001100 0.002116 0.004156 0.008244");
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-
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static IIO_DEVICE_ATTR(in_allow_async_readout, S_IRUGO | S_IWUSR,
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ina2xx_allow_async_readout_show,
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ina2xx_allow_async_readout_store, 0);
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@@ -788,6 +890,7 @@ static const struct attribute_group ina226_attribute_group = {
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static const struct iio_info ina219_info = {
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.attrs = &ina219_attribute_group,
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.read_raw = ina2xx_read_raw,
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+ .read_avail = ina2xx_read_avail,
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.write_raw = ina2xx_write_raw,
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.debugfs_reg_access = ina2xx_debug_reg,
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};
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@@ -868,6 +971,8 @@ static int ina2xx_probe(struct i2c_client *client,
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chip->avg = 1;
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ina219_set_int_time_vbus(chip, INA219_DEFAULT_IT, &val);
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ina219_set_int_time_vshunt(chip, INA219_DEFAULT_IT, &val);
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+ ina219_set_vbus_range_denom(chip, INA219_DEFAULT_BRNG, &val);
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+ ina219_set_vshunt_pga_gain(chip, INA219_DEFAULT_PGA, &val);
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}
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ret = ina2xx_init(chip, val);
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