staging: nvec: re-enable the clock on resume

On resume the slave controller is reinitialized. The tegra i2c master
controller disables the clock at the end of the initialiation, propably
to save some power, and enables it again on each transfer. We don't
do this yet and also forgot to enable the clock on resume. Fix this
copy-paste error by not disabling the clock after initialization.

This didn't striked us yet because suspend/resume hasn't landed in mainline
yet, but will soon.

Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

drivers/staging/nvec/nvec.c

@@ -750,8 +750,6 @@ static void tegra_init_i2c_slave(struct nvec_chip *nvec)
 	writel(0, nvec->base + I2C_SL_ADDR2);
 
 	enable_irq(nvec->irq);
-
-	clk_disable_unprepare(nvec->i2c_clk);
 }
 
 #ifdef CONFIG_PM_SLEEP
@@ -872,9 +870,6 @@ static int tegra_nvec_probe(struct platform_device *pdev)
 
 	tegra_init_i2c_slave(nvec);
 
-	clk_prepare_enable(i2c_clk);
-
-
 	/* enable event reporting */
 	nvec_toggle_global_events(nvec, true);