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@@ -2034,13 +2034,25 @@ static void ilk_compute_wm_parameters(struct drm_crtc *crtc,
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p->active = true;
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p->pipe_htotal = intel_crtc->config->base.adjusted_mode.crtc_htotal;
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p->pixel_rate = ilk_pipe_pixel_rate(dev, crtc);
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- p->pri.bytes_per_pixel = crtc->primary->state->fb->bits_per_pixel / 8;
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- p->cur.bytes_per_pixel = 4;
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+
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+ if (crtc->primary->state->fb) {
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+ p->pri.enabled = true;
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+ p->pri.bytes_per_pixel =
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+ crtc->primary->state->fb->bits_per_pixel / 8;
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+ } else {
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+ p->pri.enabled = false;
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+ p->pri.bytes_per_pixel = 0;
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+ }
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+
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+ if (crtc->cursor->state->fb) {
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+ p->cur.enabled = true;
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+ p->cur.bytes_per_pixel = 4;
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+ } else {
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+ p->cur.enabled = false;
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+ p->cur.bytes_per_pixel = 0;
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+ }
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p->pri.horiz_pixels = intel_crtc->config->pipe_src_w;
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p->cur.horiz_pixels = intel_crtc->base.cursor->state->crtc_w;
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- /* TODO: for now, assume primary and cursor planes are always enabled. */
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- p->pri.enabled = true;
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- p->cur.enabled = true;
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drm_for_each_legacy_plane(plane, &dev->mode_config.plane_list) {
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struct intel_plane *intel_plane = to_intel_plane(plane);
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@@ -2806,27 +2818,31 @@ static void skl_compute_wm_pipe_parameters(struct drm_crtc *crtc,
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p->pipe_htotal = intel_crtc->config->base.adjusted_mode.crtc_htotal;
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p->pixel_rate = skl_pipe_pixel_rate(intel_crtc->config);
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- /*
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- * For now, assume primary and cursor planes are always enabled.
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- */
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- p->plane[0].enabled = true;
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- p->plane[0].bytes_per_pixel =
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- crtc->primary->state->fb->bits_per_pixel / 8;
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- p->plane[0].horiz_pixels = intel_crtc->config->pipe_src_w;
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- p->plane[0].vert_pixels = intel_crtc->config->pipe_src_h;
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- p->plane[0].tiling = DRM_FORMAT_MOD_NONE;
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fb = crtc->primary->state->fb;
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- /*
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- * Framebuffer can be NULL on plane disable, but it does not
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- * matter for watermarks if we assume no tiling in that case.
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- */
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- if (fb)
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+ if (fb) {
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+ p->plane[0].enabled = true;
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+ p->plane[0].bytes_per_pixel = fb->bits_per_pixel / 8;
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p->plane[0].tiling = fb->modifier[0];
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+ } else {
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+ p->plane[0].enabled = false;
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+ p->plane[0].bytes_per_pixel = 0;
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+ p->plane[0].tiling = DRM_FORMAT_MOD_NONE;
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+ }
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+ p->plane[0].horiz_pixels = intel_crtc->config->pipe_src_w;
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+ p->plane[0].vert_pixels = intel_crtc->config->pipe_src_h;
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- p->cursor.enabled = true;
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- p->cursor.bytes_per_pixel = 4;
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- p->cursor.horiz_pixels = intel_crtc->base.cursor->state->crtc_w ?
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- intel_crtc->base.cursor->state->crtc_w : 64;
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+ fb = crtc->cursor->state->fb;
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+ if (fb) {
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+ p->cursor.enabled = true;
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+ p->cursor.bytes_per_pixel = fb->bits_per_pixel / 8;
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+ p->cursor.horiz_pixels = crtc->cursor->state->crtc_w;
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+ p->cursor.vert_pixels = crtc->cursor->state->crtc_h;
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+ } else {
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+ p->cursor.enabled = false;
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+ p->cursor.bytes_per_pixel = 0;
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+ p->cursor.horiz_pixels = 64;
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+ p->cursor.vert_pixels = 64;
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+ }
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}
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list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
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