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drm/i915/gtt: Disable read-only support under GVT

GVT is not propagating the PTE bits, and is always setting the
read-write bit, thus breaking read-only support.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Jon Bloomfield <jon.bloomfield@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180712185315.3288-3-chris@chris-wilson.co.uk
Chris Wilson 7 years ago
parent
commit
c9e666880d
1 changed files with 6 additions and 2 deletions
  1. 6 2
      drivers/gpu/drm/i915/i915_gem_gtt.c

+ 6 - 2
drivers/gpu/drm/i915/i915_gem_gtt.c

@@ -1662,8 +1662,12 @@ static struct i915_hw_ppgtt *gen8_ppgtt_create(struct drm_i915_private *i915)
 		1ULL << 48 :
 		1ULL << 48 :
 		1ULL << 32;
 		1ULL << 32;
 
 
-	/* From bdw, there is support for read-only pages in the PPGTT */
-	ppgtt->vm.has_read_only = true;
+	/*
+	 * From bdw, there is support for read-only pages in the PPGTT.
+	 *
+	 * XXX GVT is not honouring the lack of RW in the PTE bits.
+	 */
+	ppgtt->vm.has_read_only = !intel_vgpu_active(i915);
 
 
 	i915_address_space_init(&ppgtt->vm, i915);
 	i915_address_space_init(&ppgtt->vm, i915);