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@@ -50,7 +50,7 @@
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#define NVME_AQ_DEPTH 256
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#define NVME_AQ_DEPTH 256
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#define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
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#define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
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#define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
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#define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
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-
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+
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/*
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/*
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* We handle AEN commands ourselves and don't even let the
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* We handle AEN commands ourselves and don't even let the
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* block layer know about them.
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* block layer know about them.
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@@ -1349,7 +1349,7 @@ static ssize_t nvme_cmb_show(struct device *dev,
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{
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{
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struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev));
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struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev));
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- return snprintf(buf, PAGE_SIZE, "cmbloc : x%08x\ncmbsz : x%08x\n",
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+ return scnprintf(buf, PAGE_SIZE, "cmbloc : x%08x\ncmbsz : x%08x\n",
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ndev->cmbloc, ndev->cmbsz);
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ndev->cmbloc, ndev->cmbsz);
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}
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}
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static DEVICE_ATTR(cmb, S_IRUGO, nvme_cmb_show, NULL);
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static DEVICE_ATTR(cmb, S_IRUGO, nvme_cmb_show, NULL);
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