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@@ -0,0 +1,39 @@
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+Broadcom USB3 phy binding for northstar plus SoC
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+The USB3 phy is internal to the SoC and is accessed using mdio interface.
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+
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+Required mdio bus properties:
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+- reg: Should be 0x0 for SoC internal USB3 phy
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+- #address-cells: must be 1
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+- #size-cells: must be 0
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+
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+Required USB3 PHY properties:
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+- compatible: should be "brcm,nsp-usb3-phy"
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+- reg: USB3 Phy address on SoC internal MDIO bus and it should be 0x10.
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+- usb3-ctrl-syscon: handler of syscon node defining physical address
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+ of usb3 control register.
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+- #phy-cells: must be 0
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+
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+Required usb3 control properties:
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+- compatible: should be "brcm,nsp-usb3-ctrl"
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+- reg: offset and length of the control registers
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+
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+Example:
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+
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+ mdio@0 {
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+ reg = <0x0>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ usb3_phy: usb-phy@10 {
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+ compatible = "brcm,nsp-usb3-phy";
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+ reg = <0x10>;
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+ usb3-ctrl-syscon = <&usb3_ctrl>;
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+ #phy-cells = <0>;
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+ status = "disabled";
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+ };
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+ };
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+
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+ usb3_ctrl: syscon@104408 {
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+ compatible = "brcm,nsp-usb3-ctrl", "syscon";
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+ reg = <0x104408 0x3fc>;
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+ };
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