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mmc: core: fix regression: set default clock gating delay to 0

A recent commit "mmc: core: Use delayed work in clock gating framework"
(597dd9d79cfbbb1) introduced a default 200ms delay before clock gating
actually takes place.  This means that every time an MMC interface
becomes idle it first stays on for 200ms before gating its clock. This
leads to increased power consumption and is therefore a clear regression.
This patch restores the original behaviour by setting the default delay
to 0. Users prioritising throughput over power efficiency can still
modify the delay via sysfs.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
Guennadi Liakhovetski 13 年之前
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共有 1 个文件被更改,包括 2 次插入2 次删除
  1. 2 2
      drivers/mmc/core/host.c

+ 2 - 2
drivers/mmc/core/host.c

@@ -238,10 +238,10 @@ static inline void mmc_host_clk_init(struct mmc_host *host)
 	/* Hold MCI clock for 8 cycles by default */
 	host->clk_delay = 8;
 	/*
-	 * Default clock gating delay is 200ms.
+	 * Default clock gating delay is 0ms to avoid wasting power.
 	 * This value can be tuned by writing into sysfs entry.
 	 */
-	host->clkgate_delay = 200;
+	host->clkgate_delay = 0;
 	host->clk_gated = false;
 	INIT_DELAYED_WORK(&host->clk_gate_work, mmc_host_clk_gate_work);
 	spin_lock_init(&host->clk_lock);