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@@ -228,7 +228,7 @@ static struct its_collection *its_build_mapd_cmd(struct its_cmd_block *cmd,
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struct its_cmd_desc *desc)
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struct its_cmd_desc *desc)
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{
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{
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unsigned long itt_addr;
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unsigned long itt_addr;
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- u8 size = order_base_2(desc->its_mapd_cmd.dev->nr_ites);
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+ u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites);
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itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt);
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itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt);
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itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN);
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itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN);
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@@ -1043,11 +1043,18 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
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void *itt;
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void *itt;
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int lpi_base;
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int lpi_base;
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int nr_lpis;
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int nr_lpis;
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+ int nr_ites;
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int cpu;
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int cpu;
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int sz;
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int sz;
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dev = kzalloc(sizeof(*dev), GFP_KERNEL);
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dev = kzalloc(sizeof(*dev), GFP_KERNEL);
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- sz = nvecs * its->ite_size;
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+ /*
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+ * At least one bit of EventID is being used, hence a minimum
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+ * of two entries. No, the architecture doesn't let you
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+ * express an ITT with a single entry.
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+ */
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+ nr_ites = max(2, roundup_pow_of_two(nvecs));
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+ sz = nr_ites * its->ite_size;
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sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1;
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sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1;
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itt = kmalloc(sz, GFP_KERNEL);
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itt = kmalloc(sz, GFP_KERNEL);
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lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis);
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lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis);
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@@ -1061,7 +1068,7 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
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dev->its = its;
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dev->its = its;
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dev->itt = itt;
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dev->itt = itt;
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- dev->nr_ites = nvecs;
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+ dev->nr_ites = nr_ites;
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dev->lpi_map = lpi_map;
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dev->lpi_map = lpi_map;
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dev->lpi_base = lpi_base;
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dev->lpi_base = lpi_base;
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dev->nr_lpis = nr_lpis;
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dev->nr_lpis = nr_lpis;
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