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@@ -74,6 +74,30 @@ out:
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}
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EXPORT_SYMBOL_GPL(mlx5_core_access_reg);
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+int mlx5_query_pcam_reg(struct mlx5_core_dev *dev, u32 *pcam, u8 feature_group,
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+ u8 access_reg_group)
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+{
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+ u32 in[MLX5_ST_SZ_DW(pcam_reg)] = {0};
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+ int sz = MLX5_ST_SZ_BYTES(pcam_reg);
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+
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+ MLX5_SET(pcam_reg, in, feature_group, feature_group);
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+ MLX5_SET(pcam_reg, in, access_reg_group, access_reg_group);
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+
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+ return mlx5_core_access_reg(dev, in, sz, pcam, sz, MLX5_REG_PCAM, 0, 0);
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+}
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+
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+int mlx5_query_mcam_reg(struct mlx5_core_dev *dev, u32 *mcam, u8 feature_group,
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+ u8 access_reg_group)
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+{
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+ u32 in[MLX5_ST_SZ_DW(mcam_reg)] = {0};
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+ int sz = MLX5_ST_SZ_BYTES(mcam_reg);
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+
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+ MLX5_SET(mcam_reg, in, feature_group, feature_group);
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+ MLX5_SET(mcam_reg, in, access_reg_group, access_reg_group);
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+
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+ return mlx5_core_access_reg(dev, in, sz, mcam, sz, MLX5_REG_MCAM, 0, 0);
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+}
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+
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struct mlx5_reg_pcap {
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u8 rsvd0;
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u8 port_num;
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