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r8169:Fix typo in setting RTL8168H PHY PFM mode.

The PHY PFM register is in PHY page 0x0a44 register 0x11, not 0x14.

Signed-off-by: Chunhao Lin <hau@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Chun-Hao Lin 9 years ago
parent
commit
c832c35f5f
1 changed files with 2 additions and 2 deletions
  1. 2 2
      drivers/net/ethernet/realtek/r8169.c

+ 2 - 2
drivers/net/ethernet/realtek/r8169.c

@@ -3894,7 +3894,7 @@ static void rtl8168h_1_hw_phy_config(struct rtl8169_private *tp)
 
 
 	/* disable phy pfm mode */
 	/* disable phy pfm mode */
 	rtl_writephy(tp, 0x1f, 0x0a44);
 	rtl_writephy(tp, 0x1f, 0x0a44);
-	rtl_w0w1_phy(tp, 0x14, 0x0000, 0x0080);
+	rtl_w0w1_phy(tp, 0x11, 0x0000, 0x0080);
 	rtl_writephy(tp, 0x1f, 0x0000);
 	rtl_writephy(tp, 0x1f, 0x0000);
 
 
 	/* Check ALDPS bit, disable it if enabled */
 	/* Check ALDPS bit, disable it if enabled */
@@ -3967,7 +3967,7 @@ static void rtl8168h_2_hw_phy_config(struct rtl8169_private *tp)
 
 
 	/* disable phy pfm mode */
 	/* disable phy pfm mode */
 	rtl_writephy(tp, 0x1f, 0x0a44);
 	rtl_writephy(tp, 0x1f, 0x0a44);
-	rtl_w0w1_phy(tp, 0x14, 0x0000, 0x0080);
+	rtl_w0w1_phy(tp, 0x11, 0x0000, 0x0080);
 	rtl_writephy(tp, 0x1f, 0x0000);
 	rtl_writephy(tp, 0x1f, 0x0000);
 
 
 	/* Check ALDPS bit, disable it if enabled */
 	/* Check ALDPS bit, disable it if enabled */