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@@ -333,7 +333,7 @@
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#define MVPP2_GMAC_INBAND_AN_MASK BIT(0)
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#define MVPP2_GMAC_FLOW_CTRL_MASK GENMASK(2, 1)
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#define MVPP2_GMAC_PCS_ENABLE_MASK BIT(3)
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-#define MVPP2_GMAC_PORT_RGMII_MASK BIT(4)
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+#define MVPP2_GMAC_INTERNAL_CLK_MASK BIT(4)
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#define MVPP2_GMAC_DISABLE_PADDING BIT(5)
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#define MVPP2_GMAC_PORT_RESET_MASK BIT(6)
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#define MVPP2_GMAC_AUTONEG_CONFIG 0xc
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@@ -4599,7 +4599,6 @@ static void mvpp2_port_mii_gmac_configure(struct mvpp2_port *port)
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val |= MVPP2_GMAC_INBAND_AN_MASK | MVPP2_GMAC_PCS_ENABLE_MASK;
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} else if (phy_interface_mode_is_rgmii(port->phy_interface)) {
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val &= ~MVPP2_GMAC_PCS_ENABLE_MASK;
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- val |= MVPP2_GMAC_PORT_RGMII_MASK;
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}
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writel(val, port->base + MVPP2_GMAC_CTRL_2_REG);
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