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@@ -721,6 +721,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
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#define QUERY_DEV_CAP_RSVD_LKEY_OFFSET 0x98
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#define QUERY_DEV_CAP_MAX_ICM_SZ_OFFSET 0xa0
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#define QUERY_DEV_CAP_ETH_BACKPL_OFFSET 0x9c
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+#define QUERY_DEV_CAP_DIAG_RPRT_PER_PORT 0x9c
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#define QUERY_DEV_CAP_FW_REASSIGN_MAC 0x9d
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#define QUERY_DEV_CAP_VXLAN 0x9e
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#define QUERY_DEV_CAP_MAD_DEMUX_OFFSET 0xb0
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@@ -935,6 +936,9 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
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dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP;
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if (field32 & (1 << 7))
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dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_RECOVERABLE_ERROR_EVENT;
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+ MLX4_GET(field32, outbox, QUERY_DEV_CAP_DIAG_RPRT_PER_PORT);
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+ if (field32 & (1 << 17))
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+ dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT;
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MLX4_GET(field, outbox, QUERY_DEV_CAP_FW_REASSIGN_MAC);
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if (field & 1<<6)
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dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN;
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