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@@ -74,7 +74,6 @@
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* @mmio: pointer to ioremap()'d registers
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* @mmio: pointer to ioremap()'d registers
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* @sspdr_phys: physical address of the SSPDR register
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* @sspdr_phys: physical address of the SSPDR register
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* @wait: wait here until given transfer is completed
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* @wait: wait here until given transfer is completed
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- * @current_msg: message that is currently processed (or %NULL if none)
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* @tx: current byte in transfer to transmit
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* @tx: current byte in transfer to transmit
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* @rx: current byte in transfer to receive
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* @rx: current byte in transfer to receive
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* @fifo_level: how full is FIFO (%0..%SPI_FIFO_SIZE - %1). Receiving one
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* @fifo_level: how full is FIFO (%0..%SPI_FIFO_SIZE - %1). Receiving one
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@@ -93,7 +92,6 @@ struct ep93xx_spi {
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void __iomem *mmio;
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void __iomem *mmio;
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unsigned long sspdr_phys;
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unsigned long sspdr_phys;
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struct completion wait;
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struct completion wait;
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- struct spi_message *current_msg;
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size_t tx;
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size_t tx;
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size_t rx;
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size_t rx;
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size_t fifo_level;
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size_t fifo_level;
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@@ -236,8 +234,7 @@ static void ep93xx_do_read(struct ep93xx_spi *espi, struct spi_transfer *t)
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static int ep93xx_spi_read_write(struct spi_master *master)
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static int ep93xx_spi_read_write(struct spi_master *master)
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{
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{
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struct ep93xx_spi *espi = spi_master_get_devdata(master);
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struct ep93xx_spi *espi = spi_master_get_devdata(master);
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- struct spi_message *msg = espi->current_msg;
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- struct spi_transfer *t = msg->state;
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+ struct spi_transfer *t = master->cur_msg->state;
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/* read as long as RX FIFO has frames in it */
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/* read as long as RX FIFO has frames in it */
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while ((readl(espi->mmio + SSPSR) & SSPSR_RNE)) {
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while ((readl(espi->mmio + SSPSR) & SSPSR_RNE)) {
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@@ -290,7 +287,7 @@ ep93xx_spi_dma_prepare(struct spi_master *master,
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enum dma_transfer_direction dir)
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enum dma_transfer_direction dir)
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{
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{
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struct ep93xx_spi *espi = spi_master_get_devdata(master);
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struct ep93xx_spi *espi = spi_master_get_devdata(master);
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- struct spi_transfer *t = espi->current_msg->state;
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+ struct spi_transfer *t = master->cur_msg->state;
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struct dma_async_tx_descriptor *txd;
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struct dma_async_tx_descriptor *txd;
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enum dma_slave_buswidth buswidth;
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enum dma_slave_buswidth buswidth;
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struct dma_slave_config conf;
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struct dma_slave_config conf;
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@@ -415,13 +412,12 @@ static void ep93xx_spi_dma_callback(void *callback_param)
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static void ep93xx_spi_dma_transfer(struct spi_master *master)
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static void ep93xx_spi_dma_transfer(struct spi_master *master)
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{
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{
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struct ep93xx_spi *espi = spi_master_get_devdata(master);
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struct ep93xx_spi *espi = spi_master_get_devdata(master);
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- struct spi_message *msg = espi->current_msg;
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struct dma_async_tx_descriptor *rxd, *txd;
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struct dma_async_tx_descriptor *rxd, *txd;
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rxd = ep93xx_spi_dma_prepare(master, DMA_DEV_TO_MEM);
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rxd = ep93xx_spi_dma_prepare(master, DMA_DEV_TO_MEM);
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if (IS_ERR(rxd)) {
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if (IS_ERR(rxd)) {
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dev_err(&master->dev, "DMA RX failed: %ld\n", PTR_ERR(rxd));
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dev_err(&master->dev, "DMA RX failed: %ld\n", PTR_ERR(rxd));
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- msg->status = PTR_ERR(rxd);
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+ master->cur_msg->status = PTR_ERR(rxd);
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return;
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return;
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}
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}
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@@ -429,7 +425,7 @@ static void ep93xx_spi_dma_transfer(struct spi_master *master)
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if (IS_ERR(txd)) {
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if (IS_ERR(txd)) {
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ep93xx_spi_dma_finish(master, DMA_DEV_TO_MEM);
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ep93xx_spi_dma_finish(master, DMA_DEV_TO_MEM);
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dev_err(&master->dev, "DMA TX failed: %ld\n", PTR_ERR(txd));
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dev_err(&master->dev, "DMA TX failed: %ld\n", PTR_ERR(txd));
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- msg->status = PTR_ERR(txd);
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+ master->cur_msg->status = PTR_ERR(txd);
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return;
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return;
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}
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}
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@@ -587,9 +583,7 @@ static int ep93xx_spi_transfer_one_message(struct spi_master *master,
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msg->status = 0;
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msg->status = 0;
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msg->actual_length = 0;
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msg->actual_length = 0;
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- espi->current_msg = msg;
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ep93xx_spi_process_message(master, msg);
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ep93xx_spi_process_message(master, msg);
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- espi->current_msg = NULL;
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spi_finalize_current_message(master);
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spi_finalize_current_message(master);
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@@ -611,7 +605,7 @@ static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id)
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writel(0, espi->mmio + SSPICR);
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writel(0, espi->mmio + SSPICR);
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dev_warn(&master->dev,
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dev_warn(&master->dev,
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"receive overrun, aborting the message\n");
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"receive overrun, aborting the message\n");
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- espi->current_msg->status = -EIO;
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+ master->cur_msg->status = -EIO;
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} else {
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} else {
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/*
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/*
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* Interrupt is either RX (RIS) or TX (TIS). For both cases we
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* Interrupt is either RX (RIS) or TX (TIS). For both cases we
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