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@@ -148,7 +148,7 @@ static u64 notrace digicolor_timer_sched_read(void)
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return ~readl(dc_timer_dev.base + COUNT(TIMER_B));
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}
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-static void __init digicolor_timer_init(struct device_node *node)
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+static int __init digicolor_timer_init(struct device_node *node)
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{
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unsigned long rate;
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struct clk *clk;
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@@ -161,19 +161,19 @@ static void __init digicolor_timer_init(struct device_node *node)
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dc_timer_dev.base = of_iomap(node, 0);
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if (!dc_timer_dev.base) {
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pr_err("Can't map registers");
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- return;
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+ return -ENXIO;
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}
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irq = irq_of_parse_and_map(node, dc_timer_dev.timer_id);
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if (irq <= 0) {
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pr_err("Can't parse IRQ");
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- return;
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+ return -EINVAL;
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}
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clk = of_clk_get(node, 0);
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if (IS_ERR(clk)) {
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pr_err("Can't get timer clock");
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- return;
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+ return PTR_ERR(clk);
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}
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clk_prepare_enable(clk);
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rate = clk_get_rate(clk);
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@@ -190,13 +190,17 @@ static void __init digicolor_timer_init(struct device_node *node)
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ret = request_irq(irq, digicolor_timer_interrupt,
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IRQF_TIMER | IRQF_IRQPOLL, "digicolor_timerC",
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&dc_timer_dev.ce);
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- if (ret)
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+ if (ret) {
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pr_warn("request of timer irq %d failed (%d)\n", irq, ret);
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+ return ret;
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+ }
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dc_timer_dev.ce.cpumask = cpu_possible_mask;
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dc_timer_dev.ce.irq = irq;
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clockevents_config_and_register(&dc_timer_dev.ce, rate, 0, 0xffffffff);
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+
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+ return 0;
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}
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-CLOCKSOURCE_OF_DECLARE(conexant_digicolor, "cnxt,cx92755-timer",
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+CLOCKSOURCE_OF_DECLARE_RET(conexant_digicolor, "cnxt,cx92755-timer",
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digicolor_timer_init);
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