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@@ -4150,13 +4150,9 @@ static int smu7_read_clock_registers(struct pp_hwmgr *hwmgr)
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static int smu7_get_memory_type(struct pp_hwmgr *hwmgr)
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{
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struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
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- uint32_t temp;
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-
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- temp = cgs_read_register(hwmgr->device, mmMC_SEQ_MISC0);
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+ struct amdgpu_device *adev = hwmgr->adev;
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- data->is_memory_gddr5 = (MC_SEQ_MISC0_GDDR5_VALUE ==
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- ((temp & MC_SEQ_MISC0_GDDR5_MASK) >>
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- MC_SEQ_MISC0_GDDR5_SHIFT));
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+ data->is_memory_gddr5 = (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5);
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return 0;
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}
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