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@@ -32,12 +32,29 @@
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#include <asm/opal.h>
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#include <asm/opal.h>
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#include <asm/xive-regs.h>
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#include <asm/xive-regs.h>
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+/* Sign-extend HDEC if not on POWER9 */
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+#define EXTEND_HDEC(reg) \
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+BEGIN_FTR_SECTION; \
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+ extsw reg, reg; \
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+END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300)
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+
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#define VCPU_GPRS_TM(reg) (((reg) * ULONG_SIZE) + VCPU_GPR_TM)
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#define VCPU_GPRS_TM(reg) (((reg) * ULONG_SIZE) + VCPU_GPR_TM)
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/* Values in HSTATE_NAPPING(r13) */
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/* Values in HSTATE_NAPPING(r13) */
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#define NAPPING_CEDE 1
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#define NAPPING_CEDE 1
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#define NAPPING_NOVCPU 2
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#define NAPPING_NOVCPU 2
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+/* Stack frame offsets for kvmppc_hv_entry */
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+#define SFS 144
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+#define STACK_SLOT_TRAP (SFS-4)
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+#define STACK_SLOT_TID (SFS-16)
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+#define STACK_SLOT_PSSCR (SFS-24)
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+#define STACK_SLOT_PID (SFS-32)
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+#define STACK_SLOT_IAMR (SFS-40)
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+#define STACK_SLOT_CIABR (SFS-48)
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+#define STACK_SLOT_DAWR (SFS-56)
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+#define STACK_SLOT_DAWRX (SFS-64)
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+
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/*
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/*
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* Call kvmppc_hv_entry in real mode.
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* Call kvmppc_hv_entry in real mode.
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* Must be called with interrupts hard-disabled.
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* Must be called with interrupts hard-disabled.
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@@ -214,6 +231,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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kvmppc_primary_no_guest:
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kvmppc_primary_no_guest:
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/* We handle this much like a ceded vcpu */
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/* We handle this much like a ceded vcpu */
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/* put the HDEC into the DEC, since HDEC interrupts don't wake us */
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/* put the HDEC into the DEC, since HDEC interrupts don't wake us */
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+ /* HDEC may be larger than DEC for arch >= v3.00, but since the */
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+ /* HDEC value came from DEC in the first place, it will fit */
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mfspr r3, SPRN_HDEC
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mfspr r3, SPRN_HDEC
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mtspr SPRN_DEC, r3
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mtspr SPRN_DEC, r3
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/*
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/*
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@@ -295,8 +314,9 @@ kvm_novcpu_wakeup:
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/* See if our timeslice has expired (HDEC is negative) */
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/* See if our timeslice has expired (HDEC is negative) */
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mfspr r0, SPRN_HDEC
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mfspr r0, SPRN_HDEC
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+ EXTEND_HDEC(r0)
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li r12, BOOK3S_INTERRUPT_HV_DECREMENTER
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li r12, BOOK3S_INTERRUPT_HV_DECREMENTER
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- cmpwi r0, 0
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+ cmpdi r0, 0
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blt kvm_novcpu_exit
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blt kvm_novcpu_exit
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/* Got an IPI but other vcpus aren't yet exiting, must be a latecomer */
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/* Got an IPI but other vcpus aren't yet exiting, must be a latecomer */
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@@ -319,10 +339,10 @@ kvm_novcpu_exit:
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bl kvmhv_accumulate_time
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bl kvmhv_accumulate_time
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#endif
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#endif
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13: mr r3, r12
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13: mr r3, r12
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- stw r12, 112-4(r1)
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+ stw r12, STACK_SLOT_TRAP(r1)
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bl kvmhv_commence_exit
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bl kvmhv_commence_exit
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nop
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nop
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- lwz r12, 112-4(r1)
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+ lwz r12, STACK_SLOT_TRAP(r1)
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b kvmhv_switch_to_host
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b kvmhv_switch_to_host
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/*
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/*
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@@ -390,8 +410,8 @@ kvm_secondary_got_guest:
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lbz r4, HSTATE_PTID(r13)
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lbz r4, HSTATE_PTID(r13)
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cmpwi r4, 0
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cmpwi r4, 0
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bne 63f
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bne 63f
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- lis r6, 0x7fff
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- ori r6, r6, 0xffff
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+ LOAD_REG_ADDR(r6, decrementer_max)
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+ ld r6, 0(r6)
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mtspr SPRN_HDEC, r6
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mtspr SPRN_HDEC, r6
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/* and set per-LPAR registers, if doing dynamic micro-threading */
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/* and set per-LPAR registers, if doing dynamic micro-threading */
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ld r6, HSTATE_SPLIT_MODE(r13)
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ld r6, HSTATE_SPLIT_MODE(r13)
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@@ -545,11 +565,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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* *
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* *
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*****************************************************************************/
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*****************************************************************************/
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-/* Stack frame offsets */
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-#define STACK_SLOT_TID (112-16)
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-#define STACK_SLOT_PSSCR (112-24)
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-#define STACK_SLOT_PID (112-32)
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-
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.global kvmppc_hv_entry
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.global kvmppc_hv_entry
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kvmppc_hv_entry:
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kvmppc_hv_entry:
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@@ -565,7 +580,7 @@ kvmppc_hv_entry:
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*/
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*/
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mflr r0
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mflr r0
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std r0, PPC_LR_STKOFF(r1)
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std r0, PPC_LR_STKOFF(r1)
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- stdu r1, -112(r1)
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+ stdu r1, -SFS(r1)
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/* Save R1 in the PACA */
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/* Save R1 in the PACA */
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std r1, HSTATE_HOST_R1(r13)
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std r1, HSTATE_HOST_R1(r13)
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@@ -749,10 +764,20 @@ BEGIN_FTR_SECTION
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mfspr r5, SPRN_TIDR
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mfspr r5, SPRN_TIDR
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mfspr r6, SPRN_PSSCR
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mfspr r6, SPRN_PSSCR
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mfspr r7, SPRN_PID
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mfspr r7, SPRN_PID
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+ mfspr r8, SPRN_IAMR
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std r5, STACK_SLOT_TID(r1)
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std r5, STACK_SLOT_TID(r1)
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std r6, STACK_SLOT_PSSCR(r1)
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std r6, STACK_SLOT_PSSCR(r1)
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std r7, STACK_SLOT_PID(r1)
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std r7, STACK_SLOT_PID(r1)
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+ std r8, STACK_SLOT_IAMR(r1)
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
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+BEGIN_FTR_SECTION
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+ mfspr r5, SPRN_CIABR
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+ mfspr r6, SPRN_DAWR
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+ mfspr r7, SPRN_DAWRX
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+ std r5, STACK_SLOT_CIABR(r1)
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+ std r6, STACK_SLOT_DAWR(r1)
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+ std r7, STACK_SLOT_DAWRX(r1)
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+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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BEGIN_FTR_SECTION
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BEGIN_FTR_SECTION
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/* Set partition DABR */
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/* Set partition DABR */
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@@ -968,7 +993,8 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_300)
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/* Check if HDEC expires soon */
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/* Check if HDEC expires soon */
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mfspr r3, SPRN_HDEC
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mfspr r3, SPRN_HDEC
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- cmpwi r3, 512 /* 1 microsecond */
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+ EXTEND_HDEC(r3)
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+ cmpdi r3, 512 /* 1 microsecond */
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blt hdec_soon
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blt hdec_soon
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#ifdef CONFIG_KVM_XICS
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#ifdef CONFIG_KVM_XICS
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@@ -1505,11 +1531,10 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_300)
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* set by the guest could disrupt the host.
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* set by the guest could disrupt the host.
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*/
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*/
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li r0, 0
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li r0, 0
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- mtspr SPRN_IAMR, r0
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- mtspr SPRN_CIABR, r0
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- mtspr SPRN_DAWRX, r0
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+ mtspr SPRN_PSPB, r0
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mtspr SPRN_WORT, r0
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mtspr SPRN_WORT, r0
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BEGIN_FTR_SECTION
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BEGIN_FTR_SECTION
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+ mtspr SPRN_IAMR, r0
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mtspr SPRN_TCSCR, r0
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mtspr SPRN_TCSCR, r0
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/* Set MMCRS to 1<<31 to freeze and disable the SPMC counters */
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/* Set MMCRS to 1<<31 to freeze and disable the SPMC counters */
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li r0, 1
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li r0, 1
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@@ -1525,6 +1550,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300)
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std r6,VCPU_UAMOR(r9)
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std r6,VCPU_UAMOR(r9)
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li r6,0
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li r6,0
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mtspr SPRN_AMR,r6
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mtspr SPRN_AMR,r6
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+ mtspr SPRN_UAMOR, r6
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/* Switch DSCR back to host value */
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/* Switch DSCR back to host value */
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mfspr r8, SPRN_DSCR
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mfspr r8, SPRN_DSCR
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@@ -1669,13 +1695,23 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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ptesync
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ptesync
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/* Restore host values of some registers */
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/* Restore host values of some registers */
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+BEGIN_FTR_SECTION
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+ ld r5, STACK_SLOT_CIABR(r1)
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+ ld r6, STACK_SLOT_DAWR(r1)
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+ ld r7, STACK_SLOT_DAWRX(r1)
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+ mtspr SPRN_CIABR, r5
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+ mtspr SPRN_DAWR, r6
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+ mtspr SPRN_DAWRX, r7
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+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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BEGIN_FTR_SECTION
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BEGIN_FTR_SECTION
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ld r5, STACK_SLOT_TID(r1)
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ld r5, STACK_SLOT_TID(r1)
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ld r6, STACK_SLOT_PSSCR(r1)
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ld r6, STACK_SLOT_PSSCR(r1)
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ld r7, STACK_SLOT_PID(r1)
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ld r7, STACK_SLOT_PID(r1)
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+ ld r8, STACK_SLOT_IAMR(r1)
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mtspr SPRN_TIDR, r5
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mtspr SPRN_TIDR, r5
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mtspr SPRN_PSSCR, r6
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mtspr SPRN_PSSCR, r6
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mtspr SPRN_PID, r7
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mtspr SPRN_PID, r7
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+ mtspr SPRN_IAMR, r8
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
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BEGIN_FTR_SECTION
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BEGIN_FTR_SECTION
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PPC_INVALIDATE_ERAT
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PPC_INVALIDATE_ERAT
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@@ -1819,8 +1855,8 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_RADIX)
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li r0, KVM_GUEST_MODE_NONE
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li r0, KVM_GUEST_MODE_NONE
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stb r0, HSTATE_IN_GUEST(r13)
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stb r0, HSTATE_IN_GUEST(r13)
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- ld r0, 112+PPC_LR_STKOFF(r1)
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- addi r1, r1, 112
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+ ld r0, SFS+PPC_LR_STKOFF(r1)
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+ addi r1, r1, SFS
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mtlr r0
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mtlr r0
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blr
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blr
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@@ -2366,12 +2402,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_TM)
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mfspr r3, SPRN_DEC
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mfspr r3, SPRN_DEC
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mfspr r4, SPRN_HDEC
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mfspr r4, SPRN_HDEC
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mftb r5
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mftb r5
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- cmpw r3, r4
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+ extsw r3, r3
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+ EXTEND_HDEC(r4)
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+ cmpd r3, r4
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ble 67f
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ble 67f
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mtspr SPRN_DEC, r4
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mtspr SPRN_DEC, r4
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67:
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67:
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/* save expiry time of guest decrementer */
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/* save expiry time of guest decrementer */
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- extsw r3, r3
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add r3, r3, r5
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add r3, r3, r5
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ld r4, HSTATE_KVM_VCPU(r13)
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ld r4, HSTATE_KVM_VCPU(r13)
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ld r5, HSTATE_KVM_VCORE(r13)
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ld r5, HSTATE_KVM_VCORE(r13)
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