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@@ -4549,6 +4549,8 @@ static void intel_gen6_powersave_work(struct work_struct *work)
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}
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dev_priv->rps.enabled = true;
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mutex_unlock(&dev_priv->rps.hw_lock);
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+
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+ intel_runtime_pm_put(dev_priv);
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}
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void intel_enable_gt_powersave(struct drm_device *dev)
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@@ -4566,12 +4568,28 @@ void intel_enable_gt_powersave(struct drm_device *dev)
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* PCU communication is slow and this doesn't need to be
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* done at any specific time, so do this out of our fast path
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* to make resume and init faster.
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+ *
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+ * We depend on the HW RC6 power context save/restore
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+ * mechanism when entering D3 through runtime PM suspend. So
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+ * disable RPM until RPS/RC6 is properly setup. We can only
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+ * get here via the driver load/system resume/runtime resume
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+ * paths, so the _noresume version is enough (and in case of
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+ * runtime resume it's necessary).
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*/
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- schedule_delayed_work(&dev_priv->rps.delayed_resume_work,
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- round_jiffies_up_relative(HZ));
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+ if (schedule_delayed_work(&dev_priv->rps.delayed_resume_work,
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+ round_jiffies_up_relative(HZ)))
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+ intel_runtime_pm_get_noresume(dev_priv);
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}
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}
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+void intel_reset_gt_powersave(struct drm_device *dev)
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+{
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+ struct drm_i915_private *dev_priv = dev->dev_private;
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+
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+ dev_priv->rps.enabled = false;
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+ intel_enable_gt_powersave(dev);
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+}
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+
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static void ibx_init_clock_gating(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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@@ -6025,6 +6043,18 @@ void intel_runtime_pm_get(struct drm_i915_private *dev_priv)
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WARN(dev_priv->pm.suspended, "Device still suspended.\n");
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}
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+void intel_runtime_pm_get_noresume(struct drm_i915_private *dev_priv)
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+{
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+ struct drm_device *dev = dev_priv->dev;
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+ struct device *device = &dev->pdev->dev;
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+
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+ if (!HAS_RUNTIME_PM(dev))
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+ return;
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+
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+ WARN(dev_priv->pm.suspended, "Getting nosync-ref while suspended.\n");
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+ pm_runtime_get_noresume(device);
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+}
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+
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void intel_runtime_pm_put(struct drm_i915_private *dev_priv)
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{
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struct drm_device *dev = dev_priv->dev;
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