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@@ -61,6 +61,21 @@ static const struct pci_device_id amd_nb_link_ids[] = {
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{}
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};
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+static const struct pci_device_id hygon_root_ids[] = {
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+ { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_ROOT) },
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+ {}
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+};
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+
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+const struct pci_device_id hygon_nb_misc_ids[] = {
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+ { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) },
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+ {}
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+};
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+
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+static const struct pci_device_id hygon_nb_link_ids[] = {
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+ { PCI_DEVICE(PCI_VENDOR_ID_HYGON, PCI_DEVICE_ID_AMD_17H_DF_F4) },
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+ {}
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+};
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+
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const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[] __initconst = {
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{ 0x00, 0x18, 0x20 },
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{ 0xff, 0x00, 0x20 },
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@@ -194,15 +209,24 @@ EXPORT_SYMBOL_GPL(amd_df_indirect_read);
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int amd_cache_northbridges(void)
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{
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- u16 i = 0;
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- struct amd_northbridge *nb;
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+ const struct pci_device_id *misc_ids = amd_nb_misc_ids;
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+ const struct pci_device_id *link_ids = amd_nb_link_ids;
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+ const struct pci_device_id *root_ids = amd_root_ids;
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struct pci_dev *root, *misc, *link;
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+ struct amd_northbridge *nb;
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+ u16 i = 0;
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if (amd_northbridges.num)
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return 0;
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+ if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
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+ root_ids = hygon_root_ids;
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+ misc_ids = hygon_nb_misc_ids;
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+ link_ids = hygon_nb_link_ids;
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+ }
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+
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misc = NULL;
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- while ((misc = next_northbridge(misc, amd_nb_misc_ids)) != NULL)
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+ while ((misc = next_northbridge(misc, misc_ids)) != NULL)
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i++;
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if (!i)
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@@ -218,11 +242,11 @@ int amd_cache_northbridges(void)
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link = misc = root = NULL;
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for (i = 0; i != amd_northbridges.num; i++) {
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node_to_amd_nb(i)->root = root =
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- next_northbridge(root, amd_root_ids);
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+ next_northbridge(root, root_ids);
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node_to_amd_nb(i)->misc = misc =
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- next_northbridge(misc, amd_nb_misc_ids);
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+ next_northbridge(misc, misc_ids);
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node_to_amd_nb(i)->link = link =
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- next_northbridge(link, amd_nb_link_ids);
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+ next_northbridge(link, link_ids);
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}
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if (amd_gart_present())
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@@ -261,6 +285,7 @@ EXPORT_SYMBOL_GPL(amd_cache_northbridges);
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*/
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bool __init early_is_amd_nb(u32 device)
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{
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+ const struct pci_device_id *misc_ids = amd_nb_misc_ids;
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const struct pci_device_id *id;
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u32 vendor = device & 0xffff;
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@@ -268,8 +293,11 @@ bool __init early_is_amd_nb(u32 device)
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boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
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return false;
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+ if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
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+ misc_ids = hygon_nb_misc_ids;
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+
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device >>= 16;
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- for (id = amd_nb_misc_ids; id->vendor; id++)
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+ for (id = misc_ids; id->vendor; id++)
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if (vendor == id->vendor && device == id->device)
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return true;
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return false;
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@@ -281,7 +309,8 @@ struct resource *amd_get_mmconfig_range(struct resource *res)
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u64 base, msr;
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unsigned int segn_busn_bits;
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- if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
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+ if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
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+ boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
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return NULL;
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/* assume all cpus from fam10h have mmconfig */
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