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@@ -38,6 +38,7 @@
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#define CHIP_ERASE_2MB_READY_WAIT_JIFFIES (40UL * HZ)
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#define SPI_NOR_MAX_ID_LEN 6
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+#define SPI_NOR_MAX_ADDR_WIDTH 4
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struct flash_info {
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char *name;
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@@ -312,6 +313,29 @@ static void spi_nor_unlock_and_unprep(struct spi_nor *nor, enum spi_nor_ops ops)
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mutex_unlock(&nor->lock);
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}
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+/*
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+ * Initiate the erasure of a single sector
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+ */
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+static int spi_nor_erase_sector(struct spi_nor *nor, u32 addr)
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+{
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+ u8 buf[SPI_NOR_MAX_ADDR_WIDTH];
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+ int i;
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+
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+ if (nor->erase)
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+ return nor->erase(nor, addr);
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+
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+ /*
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+ * Default implementation, if driver doesn't have a specialized HW
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+ * control
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+ */
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+ for (i = nor->addr_width - 1; i >= 0; i--) {
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+ buf[i] = addr & 0xff;
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+ addr >>= 8;
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+ }
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+
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+ return nor->write_reg(nor, nor->erase_opcode, buf, nor->addr_width);
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+}
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+
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/*
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* Erase an address range on the nor chip. The address range may extend
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* one or more erase sectors. Return an error is there is a problem erasing.
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@@ -371,10 +395,9 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
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while (len) {
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write_enable(nor);
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- if (nor->erase(nor, addr)) {
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- ret = -EIO;
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+ ret = spi_nor_erase_sector(nor, addr);
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+ if (ret)
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goto erase_err;
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- }
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addr += mtd->erasesize;
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len -= mtd->erasesize;
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@@ -1138,7 +1161,7 @@ static int set_quad_mode(struct spi_nor *nor, const struct flash_info *info)
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static int spi_nor_check(struct spi_nor *nor)
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{
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if (!nor->dev || !nor->read || !nor->write ||
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- !nor->read_reg || !nor->write_reg || !nor->erase) {
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+ !nor->read_reg || !nor->write_reg) {
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pr_err("spi-nor: please fill all the necessary fields!\n");
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return -EINVAL;
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}
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@@ -1340,6 +1363,12 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode)
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nor->addr_width = 3;
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}
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+ if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
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+ dev_err(dev, "address width is too large: %u\n",
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+ nor->addr_width);
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+ return -EINVAL;
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+ }
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+
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nor->read_dummy = spi_nor_read_dummy_cycles(nor);
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dev_info(dev, "%s (%lld Kbytes)\n", info->name,
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