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@@ -831,6 +831,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c,
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if (err)
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if (err)
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goto err_destroy_rq;
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goto err_destroy_rq;
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+ set_bit(MLX5E_RQ_STATE_ENABLED, &rq->state);
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err = mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RST, MLX5_RQC_STATE_RDY);
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err = mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RST, MLX5_RQC_STATE_RDY);
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if (err)
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if (err)
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goto err_disable_rq;
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goto err_disable_rq;
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@@ -845,6 +846,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c,
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return 0;
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return 0;
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err_disable_rq:
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err_disable_rq:
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+ clear_bit(MLX5E_RQ_STATE_ENABLED, &rq->state);
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mlx5e_disable_rq(rq);
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mlx5e_disable_rq(rq);
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err_destroy_rq:
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err_destroy_rq:
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mlx5e_destroy_rq(rq);
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mlx5e_destroy_rq(rq);
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@@ -854,7 +856,7 @@ err_destroy_rq:
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static void mlx5e_close_rq(struct mlx5e_rq *rq)
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static void mlx5e_close_rq(struct mlx5e_rq *rq)
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{
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{
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- set_bit(MLX5E_RQ_STATE_FLUSH, &rq->state);
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+ clear_bit(MLX5E_RQ_STATE_ENABLED, &rq->state);
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napi_synchronize(&rq->channel->napi); /* prevent mlx5e_post_rx_wqes */
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napi_synchronize(&rq->channel->napi); /* prevent mlx5e_post_rx_wqes */
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cancel_work_sync(&rq->am.work);
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cancel_work_sync(&rq->am.work);
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@@ -1078,7 +1080,6 @@ static int mlx5e_enable_sq(struct mlx5e_sq *sq, struct mlx5e_sq_param *param)
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MLX5_SET(sqc, sqc, min_wqe_inline_mode, sq->min_inline_mode);
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MLX5_SET(sqc, sqc, min_wqe_inline_mode, sq->min_inline_mode);
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MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST);
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MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST);
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MLX5_SET(sqc, sqc, tis_lst_sz, param->type == MLX5E_SQ_ICO ? 0 : 1);
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MLX5_SET(sqc, sqc, tis_lst_sz, param->type == MLX5E_SQ_ICO ? 0 : 1);
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- MLX5_SET(sqc, sqc, flush_in_error_en, 1);
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MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);
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MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);
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MLX5_SET(wq, wq, uar_page, sq->uar.index);
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MLX5_SET(wq, wq, uar_page, sq->uar.index);
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@@ -1155,6 +1156,7 @@ static int mlx5e_open_sq(struct mlx5e_channel *c,
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if (err)
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if (err)
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goto err_destroy_sq;
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goto err_destroy_sq;
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+ set_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);
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err = mlx5e_modify_sq(sq, MLX5_SQC_STATE_RST, MLX5_SQC_STATE_RDY,
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err = mlx5e_modify_sq(sq, MLX5_SQC_STATE_RST, MLX5_SQC_STATE_RDY,
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false, 0);
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false, 0);
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if (err)
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if (err)
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@@ -1168,6 +1170,7 @@ static int mlx5e_open_sq(struct mlx5e_channel *c,
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return 0;
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return 0;
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err_disable_sq:
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err_disable_sq:
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+ clear_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);
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mlx5e_disable_sq(sq);
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mlx5e_disable_sq(sq);
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err_destroy_sq:
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err_destroy_sq:
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mlx5e_destroy_sq(sq);
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mlx5e_destroy_sq(sq);
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@@ -1184,7 +1187,7 @@ static inline void netif_tx_disable_queue(struct netdev_queue *txq)
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static void mlx5e_close_sq(struct mlx5e_sq *sq)
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static void mlx5e_close_sq(struct mlx5e_sq *sq)
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{
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{
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- set_bit(MLX5E_SQ_STATE_FLUSH, &sq->state);
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+ clear_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);
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/* prevent netif_tx_wake_queue */
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/* prevent netif_tx_wake_queue */
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napi_synchronize(&sq->channel->napi);
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napi_synchronize(&sq->channel->napi);
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@@ -3163,7 +3166,7 @@ static void mlx5e_tx_timeout(struct net_device *dev)
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if (!netif_xmit_stopped(netdev_get_tx_queue(dev, i)))
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if (!netif_xmit_stopped(netdev_get_tx_queue(dev, i)))
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continue;
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continue;
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sched_work = true;
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sched_work = true;
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- set_bit(MLX5E_SQ_STATE_FLUSH, &sq->state);
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+ clear_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);
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netdev_err(dev, "TX timeout on queue: %d, SQ: 0x%x, CQ: 0x%x, SQ Cons: 0x%x SQ Prod: 0x%x\n",
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netdev_err(dev, "TX timeout on queue: %d, SQ: 0x%x, CQ: 0x%x, SQ Cons: 0x%x SQ Prod: 0x%x\n",
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i, sq->sqn, sq->cq.mcq.cqn, sq->cc, sq->pc);
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i, sq->sqn, sq->cq.mcq.cqn, sq->cc, sq->pc);
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}
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}
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@@ -3227,13 +3230,13 @@ static int mlx5e_xdp_set(struct net_device *netdev, struct bpf_prog *prog)
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for (i = 0; i < priv->params.num_channels; i++) {
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for (i = 0; i < priv->params.num_channels; i++) {
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struct mlx5e_channel *c = priv->channel[i];
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struct mlx5e_channel *c = priv->channel[i];
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- set_bit(MLX5E_RQ_STATE_FLUSH, &c->rq.state);
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+ clear_bit(MLX5E_RQ_STATE_ENABLED, &c->rq.state);
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napi_synchronize(&c->napi);
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napi_synchronize(&c->napi);
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/* prevent mlx5e_poll_rx_cq from accessing rq->xdp_prog */
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/* prevent mlx5e_poll_rx_cq from accessing rq->xdp_prog */
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old_prog = xchg(&c->rq.xdp_prog, prog);
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old_prog = xchg(&c->rq.xdp_prog, prog);
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- clear_bit(MLX5E_RQ_STATE_FLUSH, &c->rq.state);
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+ set_bit(MLX5E_RQ_STATE_ENABLED, &c->rq.state);
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/* napi_schedule in case we have missed anything */
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/* napi_schedule in case we have missed anything */
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set_bit(MLX5E_CHANNEL_NAPI_SCHED, &c->flags);
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set_bit(MLX5E_CHANNEL_NAPI_SCHED, &c->flags);
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napi_schedule(&c->napi);
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napi_schedule(&c->napi);
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